Electronic Design

SoC Debug Environment Opens System-Level View

Complex system-on-a-chip (SoC) designs with multiple embedded processors and IP blocks present difficult debug challenges. First Silicon Solutions' (FS2) Multi-Core Embedded Debug (MED) system extends the JTAG infrastructure to create a new class of debug architecture. In so doing, it provides system-level visibility of embedded processors, on-chip buses, and IP blocks.

The MED system uses FS2's On-Chip Instrumentation (OCI) technology and tools for SoC analysis. Most silicon debug is JTAG-based, so it's limited to single-core applications. The OCI architecture provides in-depth diagnostic capabilities, including concurrent debugger support for multiple heterogeneous cores; integration of configurable logic analysis and bus-monitoring capabilities; and support for system-level triggering, control, and time stamping.

While many processor cores contain debug blocks and tools, these facilities are specific to a vendor's cores and rarely are applicable to surrounding blocks. MED provides an architecture and software integration layer that enables these debug blocks to interoperate concurrently (see the figure).

This integration layer, HyperJTAG, is a subsystem that interfaces with JTAG and other debug interfaces from cores and IP blocks. It provides concurrent access and control of the debug interfaces and logic for multiple processor systems. The JTAG/debug signals from a core are concatenated to allow four independent debug channels between a core's debug block, as well as an off-chip debugger to be maintained simultaneously.

To localize problems at the system level, the HyperDebug subsystem permits event recognition from a combination of system-level and local conditions. HyperDebug conditional triggering and actions are dynamically controllable from MED system software.

The third piece of the initial MED release is an embedded bus triggering and trace capability. MED bus-monitoring and trace blocks, called Bus Navigator, permit user-defined triggering and trace of critical embedded bus signals. Bus Navigator variants are available for ARM's AMBA AHB signals and Sonics' SiliconBackplane signals. Others will be developed based on demand.

Pricing for the MED system starts at $25,000 with immediate availability.

First Silicon Solutions
www.fs2.com

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