Electronic Design

Space-Based, Full-Chip Router Takes On Mixed-Signal And Custom-Digital Designs

Traditional shape-based and gridded routers are having trouble with today's subnanometer system-on-a-chip (SoC) designs. And when it comes to mixed-signal or custom digital SoCs, the problems are even worse, thanks to the increased complexities, high yield requirements, and sophisticated design objectives with respect to power, signal integrity, and timing.

Cadence's Precision Router is an attempt to address these issues through a 3D, space-based modeling approach. The router analyzes true shapes and the intervening physical spaces to handle the inherent complexity in today's larger designs.

The tool operates with the Virtuoso custom design platform, giving users a hierarchical and constraint-driven design-closure environment. A multiple-objective rule engine optimizes tiered and preferred manufacturing rules concurrently with electrical constraints. It allows tradeoffs to be made automatically across multiple rule sets simultaneously.

Designs can be approached incrementally, enabling users to apply automated routines to the smallest portions of the design. Or, they can perform full-chip, automatic operations, or anything in between. The tool also handles specialty routing tasks, such as differential pairs, shielding, buses, and power grids.

Contact Cadence directly for pricing and delivery information.

Cadence Design Systems
www.cadence.com

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