Electronic Design

Synopsys Takes The Analog/Mixed-Signal Plunge

Recognizing an opportunity to capture the hearts and minds of the expanding analog/mixed-signal (A/M-S) design community, Synopsys has launched the Galaxy Custom Designer, which takes the Galaxy design platform into the realm of fullcustom design implementation. Custom Designer has been built from scratch in an effort to carve market share from Cadence’s aging Virtuoso analog design environment.

Given the push for greater integration in IC design, coupled with continued growth in A/M-S content, designers are sorely in need of modern tools presented in a unified environment. That need is even more evident due to the intermixing of analog and digital circuitry on the same die and even within the same intellectual property (IP) blocks. Analog and digital content are more interdependent than ever, analog IP has entered the mainstream, and there is a greater requirement for embedded memory.

Galaxy Custom Designer is Synopsys’ effort to provide a complete suite of A/M-S tools, spanning verification and implementation (see the figure). A key feature of the suite is unified implementation for both cell-based and custom design, which reflects the blurred lines between the analog and digital realms in today’s systems-on-a-chip (SoCs). The suite is centered on a schematic editor and a layout editor. Around them are the HSpice A/M-S simulator, the Hercules physical verification environment, and the STAR-RCXT full-chip parasitic extraction tool.

The suite’s look and feel intentionally resemble Cadence’s Virtuoso environment to facilitate quick productivity. Another aid to productivity is the relatively low number of mouse clicks required to execute repetitive schematic-editing and layout tasks.

The schematic editor offers what Synopsys terms “real-time connectivity,” a feature that automatically names wires once they’re created. Another feature, called “On Canvas” editing, lets users click on circuit elements to bring up editable parameters.

In the layout editor, users can collapse the object/layer panel to gain more working room. The tool is endowed with pushbutton designrule checking and extraction to quickly reveal problems on screen. There is also a view with parasitic information for Spice analysis, from which users can cross-probe into an output-waveform window.

Another key aspect of the Galaxy Custom Designer layout editor is its compatibility with open TCL, C++, and Python-based PCells. PCells, whose analogy in the digital world is standard-cell libraries, use base transistors as their building blocks. PCells built using the Custom Designer layout editor can be reused in any other tools that support the industry-standard OpenAccess application programming interface and design database. The layout editor also features automatic via and guard-ring generation, which surrounds noisy digital circuitry with a buffer to contain noise.

The openness and portability afforded by the Galaxy Custom Designer is of potentially great benefit to foundries, which can now develop standards-based process design kits (PDKs) based on the work done by the IPL Alliance (www.iplnow.com) that will suit all OpenAccess-compliant tools. In beta release since March, Galaxy Custom Designer is available now. Contact Synopsys directly for pricing details.


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