The importance of system-level design was one of the recurring themes at this year's DAC. Many people see the SystemC language as the way to achieve high-level hardware and software design parity. To support this goal, CoWare announced the ConvergenSC SystemC product family. Pronounced "convergency," ConvergenSC uses a common infrastructure for both design and verification. It is built expressly for SystemC to integrate the multi-disciplinary requirements of system-on-a-chip (SoC) designs. Now, system architects, platform and intellectual-property (IP) developers, and system integrators have a SystemC-based environment to create optimal, differentiated SoC designs.
The first product to be announced in the ConvergenSC family is System Designer. It enables the convergence of system architecture design and verification. System Designer shaves development time by providing high-speed simulation, architecture analysis, and design implementation on a single SystemC-based infrastructure. Its capabilities include:
- The creation of SystemC Transactional Prototype models for SoCs containing multiple processors, complex buses, memories, custom logic, and software
- Simulation performance using an all-new, fully compliant, SystemC simulation architecture that runs up to five times faster than the Open SystemC Initiative (OSCI) SystemC reference simulator
- Unique analysis capabilities for creating optimal design architectures, including Bus Views showing occupancy, transactions, and contention; Memory Views showing cache hits and misses; and Embedded Processor Views showing processor utilization for software tasks or functions
CoWare's ConvergenSC System Designer product and a standalone version of the high-performance SystemC simulator, called ConvergenSC System Verifier, are available now. Both run on Sun Solaris and Linux operating systems. ConvergenSC System Designer starts at $105,000 U.S. for a three-year license. Current CoWare N2C System Designer customers may upgrade to ConvergenSC System Designer at no charge.
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