Electronic Design

Taking Verification To The Next Level</A><BR><FONT CLASS=body11>Sponsored by: <A HREF="http://www.verisity.com" TARGET=_blank CLASS=body11>VERISITY CORP.</A></FONT><A>

A quick take on automating the verification process

Complexity Rules
Mushrooming design complexity has spawned a crisis in functional verification. As the electronics industry "designs" its way out of the downturn, even more IC designers will look to take advantage of nanometer silicon processes, and the complexity issues will spiral out of control. Improvements in the verification infrastructure cannot close the gap. Functional verification is still the main bottleneck in the IC development cycle. Incomplete verification accounts for up to 75% of all respins. Verification engineers as well as vendors of verification tools must attack the complexity problem from directions other than sheer horsepower.

Platform Versus Process
When considering how to tackle these complexity issues, don't confuse verification platforms with verification processes. The platform is a collection of engines. Each engine is tailored to achieve a particular performance level, such as simulation, acceleration, or emulation. The infrastructure comprises these items. How the infrastructure is used to move from specification to verification closure is the process, which begins with a capture of specifications in a test plan. It moves to the development and, hopefully, reuse of multilevel testbenches that enforce the test plan. Assertions are developed and included at both the block and chip levels. Metrics, in various forms of "coverage," are then defined for uncovering and repairing of all bugs. Finally, all concurrent and interdependent verification activities are managed at all levels to optimize human and compute resources and achieve verification closure. The platform is the enabling foundation, while the process is the means to use the platform effectively.

Practice Makes Perfect
An up-to-date infrastructure goes a long way toward enabling verification closure, but an efficient process is even more important. There's a good deal of room for automating both the process and the development of the process itself. In either case, the key is packaging the best practices in a way that improves efficiency and various forms of coverage. Emerging methodologies accomplish this by encapsulating comprehensive and executable verification guidelines and IP, transferring specialized expertise in an era when such expertise may be in shorter supply than ever.

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