Very Wide In-System PLDs Support 68-Bit Wide Logic

With 68 inputs and 32 macrocells per Generic Logic Block (GLB), ispLSI 5384V represents the first member of the Super WIDE family of high-density PLDs designed to meet 68-bit wide functions in a single level of logic. The 7.5-ns/125-MHz ispLSI 5384V ultra-wide, high-performance in-system programmable logic device offers 18,000 gates, 384 general-purpose macrocells, and up to 288 I/Os. The ispLSI 5000V family's macrocells can support concurrent combinatorial and registered functions to improve logic utilization and feature multiple control options, including programmable register set, reset and clock enable. And the devices' output pins can be programmed to support 3.3V or 2.5V output levels, with the I/O pins also 5V tolerant.