Electronic Design

What Will It Take To Get The Perfect HDL?

A colleague of mine recently asked what I would wish for in the "perfect" hardware-description language (HDL). Well, I say, be careful about what you wish for because you just might get it.

I believe that numerous elements are required to make a better language. Fortunately, we're moving toward all of them. The major features of this new language will be things already available to us, and the development should be evolutionary, not revolutionary. The perfect language for designing hardware needs structure, hierarchy, concurrency, and a way to model time—all big drawbacks with C.

Also, there should be some kind of structured message passing between blocks. By this I don't mean just wires connecting one to the other, but rather something more like the message capability of smalltalk or C++. This type of interface construct lets blocks communicate with one another via highly structured procedures, which can have time, behavior, and so on.

In addition, the perfect language should be C-compatible, because future systems will rely more and more on a mix of hardware and software. Designers ignore this fact at their own peril—you really need to bring software into the execution flow to verify the software and the hardware together.

Moreover, I would like to see im-proved abilities to suggest and constrain implementations without forcing the user to issue those suggestions and constraints. Some primitive examples in-clude synthesis pragmas and the configuration of blocks in VHDL. Neither of these goes far enough, leaving plenty of room for improvement and innovation in this area.

Another thing that people really want is a rich set of verification capabilities for both simulation and formal techniques, so there are hooks into all kinds of different verification methods. This is important because systems are getting harder to verify, especially when you have to verify mixes of hardware and software.

Finally, intellectual property (IP) reuse should be simplified with a new language. One of the biggest barriers to the acceptance of a new HDL is that existing IP tends to get lost, grow obsolete, or simply become useless. Nobody wants to throw away their IP, and nobody wants to design huge systems from scratch.

So, where do things stand today? If you listen to the C proponents, then we have al-ready reached the summit. C fails on several counts, though, including the ability to transparently migrate C source code between hardware and software—that's simply a marketing fantasy. Plus, C is morphing itself into an HDL, but at what price? As the extensions and libraries are bolted on, these languages lose qualities that made them attractive hardware-design alternatives in the first place!

On the positive side, many attributes of a perfect language now exist in Superlog. Best of all, it's truly an evolutionary step as it retains a good deal of what makes Verilog the dominant HDL today. Superlog isn't perfect, and it has a long way to go. It still lacks suggestions and constraints on implementation. We're stuck with attributes in Superlog, which are nice, but not really designed for constraining hardware implementation.

Other than that, I believe Phil Moorby and Peter Flake of Co-Design Automation are definitely on the right track with Superlog, and they're pushing the industry in a good direction. Let's just make sure that they don't stop here, but keep improving on what they have already delivered.

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