Direct-drive, high-resolution linear motor
with integrated encoder
The SDLM-025-070-01-01 and SDLM-025-070-01-05 direct-drive linear motors have built-in Compact, conduction-cooled 504W-rated AC-DC power
These conduction-cooled PFH500F-28 AC-DC power modules feature power supplies rated atRaspberry Pi voltage output and digital I/O HAT
The MCC 152 voltage output and digital I/O HAT for Raspberry Pi features two 0-5 V analogMeasurement Computing Corporation
Motorized linear X-axis plus rotary positioning stages
The four X-and-Theta stages in this series feature linear travels of: 15 mm, 30 mm, 50 mm, and5G device testing under extreme temperatures enabled
Integrating the R&S ATS TEMP climate option into an R&S ATS1000 antenna test system makes it possible for the first time to combine testing in an RF OTA chamber and climatic chamber testing into a single procedure, saving engineers measurement time. The setup enables measurements of antenna characteristics in a temperature range from –20 °C to +85 °C. The single testing process will be useful for those working with 5G related solutions, e.g. chipset and mobile device manufacturers as well as antenna designers. Used inside the R&S ATS1000, R&S ATS-TEMP allows fast and accurate 3D thermal measurements in extreme temperatures with high repeatability and angular resolution.
Dual channel transmitters
The DT Series of dual transmitters offer a more cost-effective and space-saving solution to45V, Zero-drift operational amplifier
The MCP6V51 zero-drift operational amplifier provides ultra-high-precision measurement whileHigh-performance PXI Express FPGA module
The GX3800e employs the Altera Cyclone V FPGA, which supports data rates up to 3.125 Gb/sand features over 300,000 logic elements and 12.2 Kb of user memory. The GX3800e uses a daughter card for the I/O physical layer, and these cards can be commercial-off-the-shelf VITA 57 FPGA Mezzanine Card modules, MTS’ line of daughter cards, or user-designed cards. This facilitates the integration of many applications and interfaces including A to D, D to A, camera link, FPDP, and high-speed serial using a single PXIe slot. The design of the FPGA is done using Altera’s Quartus or the license-free Quartus Prime Lite tool set.