Powerelectronics 1159 Monolithic Ic Eq1

Monolithic IC Yields Four 1A Buck Regulators

July 27, 2012
In a single QFN package, four independent buck regulators can accept up to a 40V input and each can provide up to 1A output with 100% duty cycle operation.

Some electronic systems need as many as four different step-down power supplies. Meeting this need in a single package is Linear Technology’s LT3504 (Fig. 1). Each of its quad buck regulators allow a 3.2V to 40V input and can deliver up to 1A with as low as 0.8V of continuous output. With on-chip power switches efficiency is 88% with a 12V input, 1 MHz switching frequency, and 5V out. Housed in a 28-lead QFN package (Fig. 2) and operating at high switching frequencies keeps external inductors and capacitors small, while providing a compact, thermally efficient footprint.

Fig. 3 is a simplified diagram of the LT3504. Each of four similar buck regulators employ control logic and a bipolar power switch driven by a base drive. A boost regulator and the input voltage, VIN, provide power for each buck regulator.

The boost regulator consists of a 0.4A power switch (Q5), power Schottky diode (D5), and the associated logic and control circuits. The LT3504 monitors the boost regulator’s switch current (IB1) to enforce cycle-by-cycle current limit and monitors its Schottky diode current (IB2) to prevent inductor current runaway during transient conditions. The boost regulator requires two external components: an inductor (L5) and capacitor (C5).

System operation begins by applying input, VIN. When the EN/UVLO pin exceeds 1.44V, it activates the boost regulator and powers the reference and oscillator. Then, the boost regulator starts charging the SKY capacitor (C5), whose voltage appears on the SKY pin. While the SKY pin is less than 4.5V above VIN, the RUN/SS pins and VC nodes are pulled low, preventing the buck regulators from switching. When the SKY pin exceeds 4.85V above VIN, this voltage is applied to each base drive, ensuring that each bipolar transistor power switch can be fully saturated. This also enables each buck regulator channel to operate at 100% duty cycle, even with VIN as low as 3.2V.

To obtain a regulated output, the LT3504’s input voltage must be at least 400mV greater than the highest programmed output voltage. The only exception is when the programmed output voltage is less than 2.8V, which allows a minimum input of 3.2V. The absolute maximum LT3504 input is 40V.

You can use the EN/UVLO pin to program undervoltage lockout at input voltages exceeding 3V by using a resistor divider from VIN to EN/UVLO, as shown in Fig. 3. The rising threshold on the EN/UVLO pin is 1.44V. The falling threshold on the EN/UVLO pin is 1.33V.

Problems can occur in systems where the output will be held high while the input is absent. This may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode OR-ed with the LT3504’s output. If the VIN pin is allowed to float and the EN/UVLO pin is held high (either by a logic signal or because it is tied to VIN), then the LT3504’s internal circuitry will pull its quiescent current through its SW pin. If your system can tolerate a few mA in this state, it’s O.K. If you ground the EN/UVLO pin, the SW pin current will drop to essentially zero. However, if the VIN pin is grounded while the output is held high, parasitic diodes inside the LT3504 can pull large currents from the output through the SW pin and the VIN pin.

Switching Frequency

After being initiated by the EN/UVLO input the oscillator produces two 50% duty cycle clock signals in which channels 1 and 3 are anti-phase with channels 2 and 4. You can program the oscillator frequency by connecting a single 1% resistor (RT) from RT/SYNC to ground. The maximum programmed frequency is 2.5MHz and the minimum is 250kHz. You could also apply an external clock signal to RT/SYNC that has a minimum 0V to 1.5V amplitude and a minimum 50ns pulse-width. A sync detect circuit distinguishes between these two possible inputs.

For constant-frequency operation, you have a choice of whether to use pulse skipping or not. Without pulse skipping the maximum input voltage depends on the LT3504’s programmed switching frequency and minimum on-time, that is, the shortest time it takes to turn the switch on and off. With pulse skipping, inputs exceeding VIN will cause the IC to continue regulating the output voltage up to a 40V input. But, it will skip pulses, resulting in unwanted harmonics, increased output voltage ripple, and increased peak inductor current. As long as the inductor does not saturate and switch current remains below 2A, operation above the pulse skipping VIN will not damage the LT3504.

Soft-Start

All four buck regulators can use the RUN/SSx pin (where “x” is the channel number) to soft-start, which reduces the maximum channel input current during start-up. A capacitor tied to this pin creates a voltage ramp that you can tailor to reduce the peak start up current required to regulate the output, with little overshoot. And, you can shutdown channels individually by pulling RUN/SSx below 0.1V. In Fig. 1, all four channels use the same soft-start capacitor.

Besides soft-start, the RUN/SSx pins allow each channel to track other outputs. To implement output tracking, connect a resistor divider to this pin from the tracked output.

There is an open collector Power Good (PG) pin that remains low and goes high when all four FB pins go higher than 0.710V, which means all are in regulation. There is an internal pull-up resistor, so this pin can be left open if not used.

Inductor Selection

A good first choice for the inductor value in each buck regulator channel is:

Where:
VD = Voltage drop of the (DA) catch diode (~0.4V)

With this value there will be no sub-harmonic oscillation for applications with 50% or greater duty cycle. The inductor’s RMS current rating must be greater than your maximum load current and its saturation current should be about 30% higher. For robust operation in fault conditions, the saturation current should be above 2A. To keep efficiency high, the inductor series resistance (DCR) should be less than 0.1Ω. If the inductor doesn’t saturate excessively, an LT3504 will tolerate a shorted output.

Use a 1A Schottky for the catch diode on each channel (DA1, DA2, DA3, DA4). The diode must have a reverse voltage rating equal to or greater than the maximum input voltage. An internal comparator senses the diode current and prevents switching when the diode current is higher than the DA pin current limit. A good choice is the ON Semiconductor MBRM140 that is specified for 1A continuous forward current and 40V maximum reverse voltage.

Input Capacitor

Buck regulators draw current from the input supply in pulses with very fast rise and fall times. Therefore, use an input capacitor to reduce the resulting voltage ripple from the LT3504 and to force this very high frequency switching current into a tight local loop, which minimizes EMI. Place the input bypass capacitor close to the LT3504 and catch diode. A ceramic input capacitor combined with trace or cable inductance forms a high quality (underdamped) tank circuit. If the LT3504 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT3504’s voltage rating. So you should avoid this situation by adding an electrolytic capacitor in parallel with the ceramic input capacitors.

Bypass the LT3504 input with an X7R or X5R type ceramic capacitor. Avoid Y5V types, because they exhibit poor performance over temperature. Each of the four VIN pins should be bypassed to the nearest ground pin. However, it is not necessary to use a dedicated capacitor for each VIN pin. Channel 1 and 3 inputs may be tied together on the board layout so that both pins can share a single bypass capacitor. The same is true for channels 2 and 4. The channels are 180 degrees out-of-phase, so it is not necessary to double the capacitor value. For switching frequencies greater than 750kHz, use a 1μF capacitor or higher value ceramic capacitor to bypass each group of two VIN pins. For switching frequencies less than 750kHz, use a 2.2μF or higher value ceramic capacitor to bypass each group of two VIN pins. The Fig. 1 application diagram shows this configuration with two 1µF input capacitors.

The ceramic bypass capacitors should be located as close to the VIN pins as possible. All four VIN pins should be tied together on the board and bypassed with a low performance electrolytic capacitor, especially if the input power source has high impedance, or there is significant inductance due to long wires or cables.

Output Capacitor

The output capacitor along with the inductor filter the switched frequency square wave generated by the buck regulators, producing the DC output. This affects the output ripple, so use a low impedance capacitor at the switching frequency. This capacitor also stores energy to satisfy transient loads and stabilize the buck regulator’s control loop. Ceramic capacitors have very low equivalent series resistance (ESR) and provide the best ripple performance.

Use X5R or X7Rtypes, which will provide low output ripple and good transient response. You can improve transient performance with a high value capacitor, if the compensation network is also adjusted to maintain the loop bandwidth. A lower value of output capacitor could be used, but transient performance will suffer.

High performance electrolytic capacitors can be used for the output capacitor. Choose a capacitor intended for switching regulators, with an ESR of 0.1Ω or less. Such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low ESR.

PCB Layout

For proper operation and minimum EMI, use care in the printed circuit board layout. Large, switched currents flow in the LT3504’s VIN, SW, catch diodes and input capacitors. The loop formed by these components should be as small as possible and tied to system ground in only one location. These components, along with the inductors (L1, L2, L3, L4) and output capacitors (C1, C2, C3, C4), should be placed on the same layer of the circuit board, and make their connections on that layer. Place a local, unbroken ground plane below these components, and tie this ground plane to system ground at one location (ideally at the ground terminal of the output capacitors). The SW nodes should be kept as small as possible and kept far away from the RT/SYNC and FB nodes. Keep the RT/SYNC node and FB nodes small so that the ground pin and ground traces will shield them from the SW nodes. If you plan on using a SYNC signal to set the oscillator frequency keep the RT/SYNC node away from the FB nodes. Include vias near the exposed pad of the LT3504 package, which will help transfer its heat to the ground plane. Keep the SW5 pad/trace as far away from the FB pads as possible.

High Temperature Considerations

LT3504 die temperature must be lower than its 125°C maximum rating. This is usually not a problem unless the ambient temperature exceeds 85°C. Derate the maximum load current if the ambient temperature approaches 125°C. Programming the LT3504 to a lower switching frequency improves efficiency and reduces the dependence of efficiency on input voltage. You can estimate LT3504 power dissipation by calculating the total power loss from an efficiency measurement and subtracting catch diode losses. Thermal resistance depends on the layout of the circuit board, but 43°C/W is typical for the LT3504 package. Thermal shutdown will turn off the buck regulators and the boost regulator if the die temperature exceeds 175°C. However, users should not allow operation of the LT3504 part at die temperatures exceeding 125°C.

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About the Author

Sam Davis

Sam Davis was the editor-in-chief of Power Electronics Technology magazine and website that is now part of Electronic Design. He has 18 years experience in electronic engineering design and management, six years in public relations and 25 years as a trade press editor. He holds a BSEE from Case-Western Reserve University, and did graduate work at the same school and UCLA. Sam was the editor for PCIM, the predecessor to Power Electronics Technology, from 1984 to 2004. His engineering experience includes circuit and system design for Litton Systems, Bunker-Ramo, Rocketdyne, and Clevite Corporation.. Design tasks included analog circuits, display systems, power supplies, underwater ordnance systems, and test systems. He also served as a program manager for a Litton Systems Navy program.

Sam is the author of Computer Data Displays, a book published by Prentice-Hall in the U.S. and Japan in 1969. He is also a recipient of the Jesse Neal Award for trade press editorial excellence, and has one patent for naval ship construction that simplifies electronic system integration.

You can also check out his Power Electronics blog

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