Powerelectronics 2264 Sdltc33551

Regulator IC Maintains Constant Output Voltage Despite Momentary Input Voltage Dropout

March 26, 2014
An IC with a buck regulator, boost regulator, and a linear charger combine to seamlessly maintain a constant VOUT even if VIN drops out for a short time. The IC can aid solid state drives that experience a “power gap” when transferring DRAM data to the flash drive and also in utility power meters that need a way to send an alarm that power has failed. Plus, there may be other industrial and medical applications that can take advantage of this form of short-term power backup.

An internally-compensated, non-synchronous buck regulator in Linear Technology’s LTC3355 can supply 1 A at 2.7 V to 5 V as set by an external resistor divider. A linear charger in the IC charges a supercapacitor (or other storage element) and stores it as VCAP. If VIN drops out VCAP powers a boost regulator that automatically supplies the same VOUT, allowing it to ride-through the loss of VIN.

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Operation of the LTC3355 depends on the setting of VIN’s dropout threshold, which is done with an external resistor divider between the VIN pin and PFI pin that programs the threshold from 3 V to 20 V (Fig. 1). After start-up, an internal 1 A constant current/constant voltage (CC/CV) linear charger is enabled when VIN is above dropout threshold voltage, the EN_CHG pin is high, and VOUT is in regulation. An external resistor on the ICHG pin programs the charger current. VCAP is the fully charged supercapacitor voltage and an external resistor divider applies a reduced VCAP to the CFB pin. A hysteretic comparator compares the CFB voltage to a 0.8 V reference and turns the charger off if  CFB equals the 0.8V CFB reference.  If CFB decays to 30 mV below the CFB reference, the charger turns on. A soft-start circuit minimizes the inrush current at the start of charge. When enabled, the charge current ramps from zero to full-scale in approximately1ms, which minimizes the transient load current on VOUT.

Fig. 1. The LTC3355 contains a buck regulator, linear CC/CV charger, and boost regulator. The supercapacitor can be replaced by another storage element, such as a single-cell rechargeable battery.

VCAP is set by an external resistor divider between the VCAP pin and the CFB pin. The VCAP output has an overvoltage protection circuit that monitors the CFB voltage. If the CFB voltage increases above the CFB reference voltage by 35mV a hysteretic comparator switches in an 8 kΩ resistor from VCAP to ground. This bleeds any excess charge from the supercapacitor. If the CFB voltage decays to the CFB reference voltage, the comparator removes the 8 kΩ bleed resistor. This is done to minimize excess charge that can come from leakage currents associated with the boost regulator’s Schottky output diode.

If VIN drops out, it enables the 1 MHz constant frequency peak current mode boost regulator with internal slope compensation and disables the buck regulator. When the buck is disabled, an internal FET blocks reverse current between VOUT and VIN. The boost regulator uses the voltage stored at VCAP as a power input to produce VOUT. An error amplifier compares the divided output voltage at FB with a reference voltage of 0.8 V and adjusts the peak inductor current accordingly. The IBSTPK pin sets the peak boost current over a range of 1 A to 5 A. Boost switching regulator compensation is provided by a series RC network from the VCBST pin to ground. The boost regulator can operate over an input voltage range of 0.5 V to 5V, which is compatible with the supercapacitor voltage. The boost regulator uses the same feedback pin and error amplifier as the buck and regulates to the same VOUT. The MODE pin is used to control the buck and boost switching regulator mode. The regulators operate in PWM mode when the MODE pin is low and in Burst Mode operation when the MODE pin is high. In PWM mode as the load current is decreased, the switch turns on for a shorter period each cycle. If the load current is further decreased, the converters will skip cycles to maintain output voltage regulation. Fig. 2 illustrates operation of the LTC3355 during a VIN dropout.

Fig. 2. Voltage vs. time plot of LTC3355 operation for the circuit in Fig. 1. The supercapacitor has been charged to VCAP and VIN drops to zero. During this time VOUT remains as a constant output voltage, unperturbed by the momentary loss of VIN.

Thermal Regulation

When the buck and charger are enabled the die temperature can increase due to internal power dissipation, so a thermal regulator limits the die temperature to 110°C by reducing the charger current. This thermal regulation protects the LTC3355 from excessive temperature and allows the designer to push the limits of the power handling capability of a given circuit board without the risk of damaging the LTC3355. You can set the charge current according to typical, rather than worst-case ambient temperatures for a given application with the assurance that the charger will automatically reduce the charge current in worst-case conditions.

When the LTC3355 is in boost mode, thermal shutdown will turn the boost regulator off if the die temperature reaches 155 °C. This high temperature shutdown is active in all operating modes. The IC will resume normal operation once the temperature drops about 15 °C, to approximately 140 °C.

The LTC3355 is housed in a 20-lead 4 mm × 4 mm QFN surface mount package. The exposed pad on the bottom of the package may be soldered to a copper area that should be tied

to large copper layers below with thermal vias; these layers will spread the heat dissipated by the IC. Additional vias will reduce thermal resistance even further. With these steps, you can reduce the thermal resistance from the junction-to ambient, θJA, to 47 °C/W or less. With 100 LFPM airflow, this resistance can fall by another 25%.

External Component Selection

Bypass VIN and VINS with an X7R or X5R ceramic capacitors of 10 μF to 22 μF. Buck regulators draw current from the input supply in pulses with very fast rise and fall times. The input capacitors reduce the resulting voltage ripple at VINS and VIN and force this high frequency switching into a tight local loop, minimizing EMI.  Place the capacitors as close to the VIN pins as possible.

The output capacitor has two essential functions. First, along with the inductor, it filters the square wave generated by the buck regulator to produce the DC output. In this role it determines the output ripple so a low ESR capacitor is required. Second, it stores energy that satisfies transient loads and stabilizes the buck regulator control loop. Use ceramic capacitors with very low equivalent series resistance (ESR) to achieve low output ripple.

When choosing a capacitor, look carefully through the data sheet to find out what the actual capacitance is with the applied voltage and temperature. In some cases, a physically larger capacitor, or one with a higher voltage rating, may be required. High performance tantalum or electrolytic capacitors can be used for the output capacitor. Low ESR is important, so choose one intended for switching regulators. The specified ESR should be 0.05 Ω or less.

A Schottky rectifier diode is recommended for the boost rectifier diode connected to pin 16. The diode should have low forward drop at the peak operating current, low reverse current and fast reverse recovery time. Its current rating should reflect its power dissipation as well as output current requirements. The diode current rating should be equal to or greater than the average forward current, which is normally equal to the output current. Its reverse breakdown voltage should be greater than VOUT plus any peak ringing voltage generated at the SW2 pin. Generally higher reverse breakdown diodes will have lower reverse currents.

The boost inductor in Fig. 1 is rated 3.3 μH to ensure fast transfer of power from the buck to the boost after a VIN dropout.

For proper operation and minimum EMI, exercise care laying out the printed circuit board. Large switched currents flow in the VIN, SW1, SW2 and paddle ground pins, the buck catch diode, boost rectifier diode and the input capacitor. The loop formed by these components should be as small as possible. These components, along with the inductors and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. All connections to GND should be made at a common star ground point or directly to a local, unbroken ground plane below these components. SW1 and SW2 nodes should be laid out carefully to avoid interference. Keep the FB, PFI, ICHG, IBSTPK, VCBST and CFB nodes small so that the ground traces will shield them from the switching nodes. To keep thermal resistance low, extend the ground plane as much as possible and add thermal vias under and near the paddle.

About the Author

Sam Davis

Sam Davis was the editor-in-chief of Power Electronics Technology magazine and website that is now part of Electronic Design. He has 18 years experience in electronic engineering design and management, six years in public relations and 25 years as a trade press editor. He holds a BSEE from Case-Western Reserve University, and did graduate work at the same school and UCLA. Sam was the editor for PCIM, the predecessor to Power Electronics Technology, from 1984 to 2004. His engineering experience includes circuit and system design for Litton Systems, Bunker-Ramo, Rocketdyne, and Clevite Corporation.. Design tasks included analog circuits, display systems, power supplies, underwater ordnance systems, and test systems. He also served as a program manager for a Litton Systems Navy program.

Sam is the author of Computer Data Displays, a book published by Prentice-Hall in the U.S. and Japan in 1969. He is also a recipient of the Jesse Neal Award for trade press editorial excellence, and has one patent for naval ship construction that simplifies electronic system integration.

You can also check out his Power Electronics blog

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