The LT8602 from Linear Technology is a constant-frequency, current-mode, monolithic buck-switching regulator with four output channels (Fig. 1). Two are high-voltage channels with a 3V to 42V input and the other two are low voltage channels with a 2.6V to 5.5V input.
The IC employs a single oscillator that generates two clock (CLK) signals 180 deg. out of phase. Channels 1 and 3 operate on CLK1, while channels 2 and 4 operate on CLK2. A buck regulator only draws input current during the top switch on cycle, so multiphase operation cuts peak input current and doubles the input current frequency. This reduces both input current ripple and the required input capacitance.
Each high-voltage (HV) channel is a synchronous buck regulator that operates from its own PVIN pin. The internal top power MOSFET turns on at the beginning of each oscillator cycle, and turns off when the current flowing through the top MOSFET reaches a level determined by its error amplifier. The error amplifier measures the output voltage through an external resistor divider tied to the FB pin to control the peak current in the top switch.
While the top MOSFET is off, the bottom MOSFET is turned on for the remainder of the oscillator cycle or until the inductor current starts to reverse. If overload conditions result in more than 2A (Ch 1) or 3.3A (Ch 2) flowing through the bottom switch, the next clock cycle will be delayed until switch current returns to a lower, safe level.
High-voltage channels have Track/Soft-Start Inputs (TRKSS1, TRKSS2). When this pin is below 1V, the converter regulates the FB pin to the TRKSS voltage instead of the internal reference. The TRKSS pin has a 2.4μA pull-up current. The TRKSS pin can also be used to allow the output to track another regulator, either the other HV channel or an external regulator.
Low-Voltage (LV) Buck Regulators
Each low-voltage channel has a synchronous buck regulator that operates from an independent PVIN pin. The PVIN pins have an undervoltage lockout (UVLO) set at 2.35V. Each internal top-power MOSFET is turned on at the beginning of each oscillator cycle, and turned off when the current flowing through the top MOSFET reaches a level determined by its error amplifier. Its error amplifier measures the output voltage through an external resistor divider tied to the FB pin to control the peak current in the top switch.
The LV error amplifier has an internal 800mV reference. Each LV channel has a RUN pin to allow power sequencing and an internal soft-start circuit ramps the output voltage up in 1ms (TRKSS).
While the top MOSFET is off, the bottom MOSFET is turned on for the remainder of the oscillator cycle or until the inductor current starts to reverse. If overload conditions result in more than 2.4A flowing through the bottom switch, the next clock cycle will be delayed until switch current returns to a safe level.
The LT8602 can tolerate a shorted output. If the bottom MOSFET current exceeds the valley current limit at the start of a clock cycle, the top MOSFET stays off until the overcurrent situation clears. This prevents the buildup of inductor current during a shorted output.
Light Load Operation
At light load, the regulators operate in low-ripple burst mode, which shuts down most internal circuitry between switch-on cycles to conserve power while still retaining low ripple at the output.
The EN/UVLO pin is used to put the LT8602 in shutdown, reducing the input current to less than 1μA. The accurate 1.2V threshold of the EN/UVLO pin allows a programmable VIN undervoltage lockout (UVLO) through an external resistor divider tied to the EN/UVLO pin. A 50mV (typ.) hysteresis voltage on the EN/UVLO pin prevents switching noise from inadvertently shutting down the LT8602.
Each channel has a power good (PG) comparator that trips when the feedback pin is above or below its reference voltage by more than 8%. The PG output pins are open drain. The PG pin for each channel is pulled low when the corresponding output is out of regulation.
Resistor dividers on the outputs set the output voltages as shown in Fig. 2. The formula is:
Where:
VOUTx = Output voltage of regulator x
FBREF = Feedback reference voltage
FBREF = 1V for the high voltage regulators (channel 1 and 2)
FBREF = 800mV for the low voltage channels (channel 3 and 4)
Use 1% resistors in the dividers. R2 should be 200k or less to avoid noise problems. You can use a feedforward capacitor, Cff, to improve the frequency response. Typical values are 10pF to 100pF. Route the VFB node away from noise sources, such as the inductor or an SW line.
Unique design techniques and a new high-speed process enable high efficiency over a wide input voltage range, and the LT8602’s current-mode topology enables fast transient response and excellent loop stability. Figure 3 shows plots of the efficiency of both the HV and LV channels versus load current.
Switching Frequency
The LT8602 uses a constant frequency architecture that you can program from 250kHz to 2.2MHz by tying a resistor from the RT pin to ground. Selection of the operating frequency is mainly a trade-off between efficiency and component size. The advantage of high-frequency operation is that smaller inductor and capacitor values may be used. The advantage of low-frequency operation is higher efficiency.
A high switching frequency also decreases the duty cycle range because of finite minimum on- and off-times that are independent of the switching frequency. The top switch in the high-voltage channel has a minimum on-time of 60 ns and minimum off-time of 70 ns. The top switch in the low-voltage channel has a minimum on-time of 70 ns and minimum off-time of 70 ns.
Using the SYNC pin, you can synchronize the LT8602’s internal oscillator to an external 250kHz to 2.2MHz clock signal.
Input Voltage
Each switching regulator channel operates from its own PVIN pin (PVIN1 to PVIN4). The PVIN pin can be connected to either an independent voltage supply or a high-voltage channel output. The PVIN1 and PVIN2 voltage range is 3.0V to 42V. The PVIN3 and PVIN4 voltage range is 2.6V to 5.5V.
For a PVIN below the calculated minimum voltage, the channel starts to skip switch-off cycles. At low input voltages, the part will turn on the top switch for longer than a full switch cycle in order to extend the effective duty cycle. When the part is extending the effective duty cycle the switching frequency will drop to one half (or less) of the programmed frequency.
If PVIN is above the calculated maximum voltage, the channel starts to skip switch on cycles (pulse-skipping). In this case, the channel switching frequency will no longer be the programmed frequency. The output will continue to regulate, but the peak inductor current and output ripple will increase significantly.
Inductor Selection
Inductor selection involves inductance, saturation current, series resistance (DCR), and magnetic loss. Inductor current ripple and peak current depend on the selected inductance.
To guarantee sufficient output current, peak inductor current must be lower than the switch current limit (ILIM). To keep the efficiency high, the inductor series resistance (DCR) should be as small as possible (<0.1Ω for channels 1, 3 and 4 and <0.06Ω for channel 2), and the core material should be chosen according to the switching frequency.
A larger value inductor provides a slightly higher maximum load current and reduces the output voltage ripple. A larger value inductor can result in higher efficiency if the DCR and magnetic losses are the same. However, for inductors of the same dimensions, the larger value inductor has higher DCR. The trade-off between inductance and DCR is not always obvious.
Low inductance may result in discontinuous mode operation, which is acceptable, but reduces maximum load current. For duty cycles greater than 50%, there is a minimum inductance required to avoid subharmonic oscillations.
Capacitor Selection
Bypass each PVIN pin of the LT8602 with a ceramic capacitor of X7R or X5R type. Buck converters draw current from the input supply in pulses with very fast rise and fall times so the input capacitor must reduce the resulting voltage ripple at the LT8602 input and force the switching current into a tight local loop, which minimizes EMI. To do this effectively, the input capacitor must have low impedance at the switching frequency as well as an adequate ripple-current rating. The worst-case ripple current is when VOUT is one half of PVIN.
Careful placement of CIN is essential to get the lowest ripple and EMI. Place CIN as close to the PVIN pin as possible and on the same side of the PC board. The layer immediately below the component traces should be an unbroken ground plane. The ground side of CIN should have at least two vias to the ground plane as close to CIN as possible. This provides a high-frequency return path directly under the PVIN to CIN trace, which minimizes loop area of the high-frequency, high-current path from PVIN to CIN and back to the GND exposed pad.
Exercise caution when using ceramic capacitors at the input. A ceramic input capacitor can combine with stray inductance to form a resonant tank circuit back to the supply. If power is applied quickly (for example by plugging the circuit into a live power source), this tank can ring, as much as doubling the input voltage. The solution is to either clamp the input voltage or dampen the tank circuit by adding a lossy capacitor in parallel with the ceramic capacitor.
The output capacitor performs two functions. First, it filters the inductor current to generate an output with low voltage ripple. Second, it stores energy to minimize overshoot during transient loads. Because the LT8602 operates at a high frequency, minimal output capacitance is necessary. Ceramic capacitors, which achieve very low output ripple and small circuit size, are therefore an option.
A constraint on the output capacitor is that it must have greater energy storage than the inductor. When the load current steps from high to low, the stored energy in the inductor transfers to the output and the resulting voltage step should be small compared to the regulation voltage.
Low ESR and small size make ceramic capacitors the preferred type for LT8602 applications. However, not all ceramic capacitors are the same. Many of the higher-value capacitors use poor dielectrics with high temperature and voltage coefficients. In particular, Y5V and Z5U types lose a large fraction of their capacitance with applied voltage and at temperature extremes. Because loop stability and transient response depend on the value of COUT, this loss may be unacceptable. Therefore, use X7R or X5R types.
Thermal Considerations
Care should be taken in the layout of the PCB to ensure good heat sinking of the LT8602. The exposed pad on the bottom of the package must be soldered to a ground plane. This ground should be tied to large copper layers below with thermal vias; these layers will spread heat dissipated by the LT8602.
The LT8602 is available in a thermally enhanced 40-lead 6mm x 6mm QFN package. Three temperature grades are available, with operation from –40°C to 125°C (junction) for the extended E- and industrial I-grades.
