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It Takes A WaRPed Mind To Design Wearable Tech

It Takes A WaRPed Mind To Design Wearable Tech

Wearable tech was all the rage at this year’s International CES in Las Vegas. If you can think of it, then it probably can be made mobile. Smartwatches, wireless pedometers, and other gadgets all were integrating multiple functions into mobile devices. The fitness market led the way, but smart glasses like Google Glass (see “A View Of Google Glass” at have garnered more attention.

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The plethora of low-power sensors and low-power, flexible displays opens up a wide range of design possibilities from medical sensors to augmented reality. The challenge for this type of design is that it is not easy to assemble the required components because of space and power constraints. So how does a designer turn an idea into a wearable device?

Fig. 1: Freescale’s Wearable Reference Design (WaRP) application processor board (APB) is designed for a modular prototype that would typically include a daughterboard with custom peripherals.

compact (38 mm by 14 mm) Wearable Reference Design (WaRP) application processor board (APB) allows designers to incorporate a 1-GHz  i.MX 6SoloLite into a compact design (Fig. 1). It includes the Cortex-A9 system-on-chip (SoC) plus Bluetooth and 802.11 Wi-Fi communication, a six-axis accelerometer and magnetic sensor, and a lithium-polymer (LiPo) battery charger. There is a USB interface that also can provide power. The module includes drivers for LCD or E-ink e-paper displays.

To keep the module small, Freescale takes advantage of a Samsung MCP that has 4 Gbytes of double-data-rate (DDR) memory plus flash memory. Combining multiple die into a single package like this is one way to keep wearable devices small. The system also runs Android, which provides a high level of functionality, though the hardware platform can handle a range of operating systems.

The WaRP module is designed to plug into a daughterboard that provides additional peripherals, displays, and connectors. One of the first daughterboards incorporates Freescale’s KL-16 sensor hub (see “Chip Integrates Sensor Framework ” at linked to a Freescale pedometer sensor and wireless charging system (Fig. 2).

Fig. 2: The WaRP is based on a Cortex-A9 i.MX 6SoloLite, but it may be combined with other processors like the Cortex-M0-based sensor hub.

The module is not designed to be incorporated into a product. Rather, a typical design will have a custom board that would include many or all of the components found in the APB. Freescale developed the platform with partners like Kynetics and Revolution Robotics. They provide rapid prototyping support and help create the WaRP hybrid design architecture.

Wearable tech can be very small using tiny micros like Freescale’s 1.9- by 2-mm KL02 Cortex-M0+ (see “The Tiny Cortex-M0+ Just Got Smaller” at or even working directly with the silicon. Silicon Labs will even sell you die directly (see “Buy A Wafer—Use A Die” at This makes it possible for many applications to simply disappear inside clothes and jewelry, providing functionality without being obvious.

Check out more wearable tech at CES here.

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This file type includes high resolution graphics and schematics when applicapable.


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