Noise Considerations in ADC Signal Chains (Download)

Read this article online.

Many noise sources can plague high-speed radio-frequency (RF) analog signal chains, making design considerations that much more challenging. Both megahertz and sub-terahertz sampling-rate converters have analog, clock, and power inputs, which realize the converter as a multi-input “mixer” with a digital back end.

With continuously constrained converter headroom, maintaining a noise spectral density of 150 dB_FS/Hz is challenging with each new design. That’s why it’s paramount to recognize the importance of the surrounding noise contributions that may erode performance within the entire signal chain.

Indeed, there’s an extensive range of noise principles—too many to even list. This article addresses some basic noise principles and how to apply them to each analog-to-digital converter (ADC) input node to minimize any noise convolving onto the output spectrum.