Powering Today’s Data Centers Requires an Effective Grid-to-Gate Strategy

Sponsored by Texas Instruments: Rapid growth in server power consumption necessitates an effective grid-to-gate strategy.
Feb. 24, 2026
5 min read

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Today’s data centers have developed a ravenous appetite for power as they tackle large language models and other compute-intensive artificial-intelligence (AI) and machine-learning (ML) applications. Figure 1 shows the growth in server-rack power requirements from 2010 with forecasts to 2028.

While power requirements were relatively constant throughout the first decade of that period, they have exploded since 2020. Consequently, the IT server rack is evolving to efficiently deliver that power from the utility grid to the semiconductor gate.

Rack-Server Generations

Figure 2 illustrates the first generator data-center power-distribution architecture. In this approach, in use since the 1990s, three-phase medium-voltage power from the utility grid gets transformed down to 480-V line-to-line.

That voltage is applied to a battery-based uninterruptible power supply (UPS). It can filter out brief line-voltage dips or, in the event of a longer outage, keep the servers running until a backup generator is brought online using an automatic transfer switch (ATS) or static transfer switch (STS).

From the UPS output, a power-distribution unit (PDU) delivers power to power-supply units (PSUs) for each server tray, which perform power factor correction (PFC). The PSUs also derive a regulated 12-V DC output for use by various voltage regulators (VRs), including point-of-load (PoL) regulators, which deliver low voltages for processor, memory, and communications chips within the server tray.

As total rack power rose above 10 to 20 kW, this first-generation approach began running out of steam. Second-generation architectures retain the 13-kV medium-voltage AC grid input and ATS/STS backup-generator switches. However, the front-end UPS’s function is replaced by a battery backup unit (BBU) or capacitor backup unit (CBU) in each IT rack.

Each rack also contains an AC-DC power shelf, which converts 480 V AC to 50 V DC. A bus distributes the 50 V DC to each IT tray, where an intermediate bus converter (IBC) develops 12-V power rails.

Second-generation architectures are feasible up to about 100 to 200 kW per rack. But as server racks reach the 1-MW power level, the 50-V DC bus would need to carry currents equaling 20,000 A, an impractical option. Consequently, today’s third-generation power architectures are moving to 800- or ±400-V high-voltage DC (HVDC) buses, bringing bus current requirements down to a more manageable 1.25 kA.

In addition, with third-generation architectures, the AC and DC power shelves containing the AC-DC converters and BBUs or CBUs are moving into sidecars (Fig. 3). Each sidecar distributes a high-voltage DC to an HVDC busbar in each server rack, which in turn carries the HVDC level to high-conversion-ratio IBCs for each server tray within a server rack.

On the horizon is a fourth-generation architecture, in which the sidecar moves to a utility room to free up space on the main IT floor. In addition, the fourth generation moves the AC-DC conversion function into a solid-state transformer, which implements the AC step-down and PFC functions as well as the conversion, resulting in higher efficiency.

Compute Density

Of course, moving the power components to the sidecar and the sidecar to a utility room doesn’t eliminate the physical space occupied by these components. Pradeep Shenoy, compute power technologist at Texas Instruments, comments in a video presentation that the sidecar approach “…frees up valuable space in the IT rack to increase overall compute density.” The result is more processors packed near each other in each rack, which minimizes latency to optimize the execution of large AI models.

The sidecar itself may contain next-generation 30-kW server PSUs, such as the one illustrated in Figure 4. This design converts a three-phase input to a ±400-V output using a three-level flying-capacitor PFC stage and a delta-delta connected three-phase LLC stage.

Even with the use of sidecars, some power components such as IBCs remain within the IT trays in each IT rack, with the processor voltage regulators (VRs) located on the processor boards. Shenoy said that, traditionally, these VRs have been deployed in a lateral-power-delivery (LPD) approach. With LPD, the VRs are located adjacent to the processors, either on the top (Fig. 5, top left) or bottom (Fig. 5, bottom left) of the board, with current flowing laterally through traces within PCB layers.

The resistance of these traces, however, leads to additional power loss and excess heat generation. Consequently, designers are implementing vertical-power-delivery (VPD) schemes, in which these regulators are mounted on the bottom side of the board directly below the processors (Fig. 5, right).

Power Components

TI offers a variety of power components that maximize compactness, performance, efficiency, and reliability in data-center applications. For example, Shenoy said a 30-kW PSU such as the one in Figure 4 can use more than 20 TI devices, including sensors, controllers, power switches, bias power supplies, and gate drivers.

A new member of TI’s product portfolio of data-center power components is the LMG365xR025 650-V, 25-mΩ gallium-nitride (GaN) FET power switch with an integrated driver and protection functions. “By integrating these features, you get the best out of the GaN switch, and you're solving system level challenges at the same time,” said Shenoy.

To help you get started with GaN designs, TI offers a variety of reference designs as well as evaluation boards and daughtercards that help you experiment with various circuit configurations and study their interactions with larger systems.

Conclusion

The rapidly growing power requirements for data centers necessitate an efficient grid-to-gate power-delivery strategy. TI offers a portfolio of rack energy-storage and PSU components that play key roles in the latest power-distribution architectures.