Dhruv Aggarwal

Dhruv Aggarwal is a Senior RTL Design Engineer at NVIDIA Inc in Santa Clara, California, working on the micro-architecture of display and GPU hardware, including low-power design of pixel-processing pipelines. He previously spent five years designing area-optimized spatial-prediction hardware for the HEVC, AV1, and micro-architecting H.266/VVC video codecs at Qualcomm. He is a co-inventor on patents covering chroma-from-luma prediction (US 12,395,655) and reference-pixel upsampling for intra-prediction in video coding (US 11,595,665), and holds an MS in Electrical Engineering from Columbia University. The views expressed in this article are his own and do not represent any employer.