16-Bit, 210-Msample/s ADC Achieves 80-dB SNR

16-Bit, 210-Msample/s ADC Achieves 80-dB SNR

Targeting high-end communications receivers and instrumentation, Linear Technology’s LTC2107 16-bit, 210-Msample/s analog-to-digital converter (ADC) brandishes 80-dB signal-to-noise ratio (SNR) performance along with 98-dB spurious-free dynamic range (SFDR) at baseband. Aperture jitter of 45-fs rms enables direct sampling of frequencies up to 500 MHz with high SNR performance. An optional internal transparent dither circuit improves the ADC’s SFDR response beyond 100 dBFS for low-level input signals. Its digital output randomizer and alternate bit polarity mode significantly reduce unwanted tones caused by digital feedback. Digital outputs can run as full-rate CMOS below 100-Msample/s rates, or double-data-rate (DDR) LVDS to minimize routing of lines to the FPGA. A programmable gain amplifier (PGA) front end sets the ADC input range to either 2.4 or 1.6 V p-p, enabling tradeoffs between noise and distortion. Packaged in a 7- by-7-mm QFN, it dissipates 1.3 W without the need for heatsinking. Analog input bandwidth extends to 800 MHz.


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