According to Texas Instruments, its RF-sampling ADC12J4000 12-bit analog-to-digital converter (ADC) reaches speeds of 4 Gsamples/s while consuming 1.9 W of power—50% less power than competitive devices. The ADC supports the JEDEC JESD204B serial interface standard for data converters up to 8 Gbits/s, enabling it to output data on one to eight lanes (depending on the decimation and link-rate settings). It combines the company’s existing gigasample ADC intellectual property (IP) with low-power digital-processing blocks that provide digital filtering and downconversion. Consequently, system designers can sample a large block of frequency spectrum at RF and downconvert it to quadrature in the digital domain, which helps reduce signal distortion. Multi-band summation performs some of the external signal conditioning typically handled by the FPGA at a total decimation of 4/8/10/16/20/32x, leading to an attenuation of approximately 80 dB at 80% bandwidth, 44 dB at 85%, and 24 dB at 90%. The device’s flexible signal bandwidth deliver a low-noise power ratio of 48.5 dB and noise floor of ‒149 dBFS/Hz. Its 68-pin, 10- by 10-mm QFN packaging supports the industrial ambient temperature range of ‒40 to +85°C.