18-Bit, 1.6-Msample/s ADCs Scale Input To Eliminate Dual Supplies

Feb. 22, 2011
There is a good deal of competition in this corner of the ADC world. To position itself, Linear decided to look at the problem of digitizing readings at the high and low end of the sensor output range. Usually, that requires a separate negative supply; with this design, they found a way to get away with one supply.

LTC2379-18

To digitize sensor outputs from 0 V to VRef, designers once had to run the signal-conditioning amplifier and analog-to-digital converter (ADC) on positive and negative supplies. There were several problems with that. For example, the driver-amp output transistors required several tens of millivolts to maintain linearity, and the negative supply would dissipate power. Also, the need for a negative supply introduced problems in terms of circuit board routing and bill-of-materials cost.

In the past, solving these problems meant eliminating the negative supply and reducing the level of the input signal. Unfortunately, that meant that the analog-to-digital converter (ADC) might not be able to generate codes near the top and bottom of the transfer function.

To avoid those problems, Linear Technology has added a novel feature to its LTC2379-18 (see the figure) successive approximation register (SAR) 18-bit ADC. Linear calls it Digital Gain Compression. With Digital Gain Compression enabled, the ADC scales the input in a way that maps zero-scale code to 0.1 VRef and full-scale code to 0.9 VRef.

For a reference voltage of 5 V, then, the input range will actually be from 0.5 to 4.5 V, providing headroom for the drive amplifier so it doesn’t need a negative supply. That way, the system designer gets the full 262,144 codes of the 18-bit ADC, and they cover the entire sensor range.

The LTC2379-18 samples at 1.6 Msamples/s and its signal to noise ratio (SNR) is specified at 101 dB, which Linear says is 4 dB better than the chip’s closest competition. Guaranteed maximum integral non-linearity (INL) is ±2 least significant bits (LSBs) with no missing codes. Operating from a 2.5-V supply, the ADC consumes 18 mW. True no-latency operation enables accurate one-shot measurements even after lengthy idle periods with no minimum sample rate required.

Although the LTC2379-18 is the highest-resolution member of Linear’s new family of SAR ADCs for industrial applications, it is not the fastest. There is also the 16-bit, 2-Msample/s LTC2380-16, with 96-dB SNR and ±0.5-LSB maximum integral non-linearity (INL). These devices will be followed by more 18/16-bit high-performance SAR ADCs with speeds ranging from 250 ksamaples/s up to 2 Msamples/s, all with digital gain compression.

The LTC2379-18 costs $29.95 and the LTC2380-16 costs $24.50, both in 1000-piece quantities.

Linear Technology

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