Electronic Design

Analog Front Ends Max Out Performance

These mixed-signal chips fit their target applications like a glove, speeding up system design and ultimately time-to-market.

Once regarded as more of a custom chip, the analog front end (AFE) has come into its own as a standard offering, whether the application is specific or general-purpose. Today, designers can select from multiple AFE configurations, satisfying a wide range of market requirements.

These versatile ICs accelerate system development by combining a certain amount of digital control and sometimes signal processing with data converters. Many AFE chips are application-specific, targeting wired and wireless communications, image processing, and industrial control, just to name a few.

In contrast, other AFEs are general-purpose building blocks. These may be "little-d, big-A" devices (some digital circuitry, much analog circuitry), with a simple state-machine-controlled multiplexer feeding one or more data converters. Or, they may be "big-D, little-a" chips (mostly digital with a smattering of analog) that include one or more data converters along with other microcontroller (MCU) peripherals.

Generally, the common functional denominator in all AFEs is their data converters—both digital-to-analog converters (DACs) and analog-to-digital converters (ADCs). The schemes for DACs don't differ greatly, but the architectures for ADCs may be delta-sigma, successive-approximation, or pipelined. Each architecture has limitations in terms of throughput, resolution, latency, filtering requirements, power consumption, and silicon footprint. Not surprisingly, the various converter architectures affect performance in the target application.

Over the past 12 months, a number of new exciting AFEs took aim at various applications, including both wired and wireless communications, industrial electronics, and consumer imaging. Several workhorse general-purpose AFEs have also arrived.

...for Wired Communications.
DSL and other wireline communication modes constitute one of the larger markets for AFEs. Analog Devices, Texas Instruments, and STMicroelectronics, among others, have portfolios of parts that target commodity-volume applications.

Now, thanks to the promise of standards, powerline-based networking represents a new and challenging applications arena. Late in 2003, Analog Devices released the AD9865 (see "Taming the Wild Powerline," p. 56), which supports powerline networking, VDSL, and Home Phoneline Networking Alliance (HPNA) broadband modems.

Chip companies are forever driven to find the right combination of features to bundle in their AFEs. For instance, STMicro recently introduced a new AFE as part of a two-chip set for a USB-based, rate-adaptive ADSL modem. The MTC20154 consists of a 12-bit DAC and a 13-bit ADC, both running at 8.8 Msamples/s. In this chip set, almost all digital processing is handled by the companion chip, the MTC20455, a common functional partitioning among all AFE suppliers.

...for Wireless Communications.
Bluetooth and the alphabet soup of IEEE 802.11 standards continue to propel the wireless AFE market. Earlier this year, STMicroelectronics introduced the STLC2150, a fully integrated Bluetooth single-chip radio transceiver intended to work with a variety of standard BlueRF-interface baseband processors, including STMicro's own STLC2410 (Fig. 1).

A more general-purpose AFE for the IF receive channel in software radios can be found with TI's AFE8201 (Fig. 2). It samples narrowband (2.5-MHz or less) IF signals and digitally mixes, filters, and decimates the signals to baseband.

...for Industrial Electronics.
Aimed at the industrial market, Analog Devices' ADS7869 is a 12-channel, three-ADC motor-control front end. The AFE offers three fully differential inputs. Each input connects to a window comparator and a sign comparator. A digital interface on the chip's parallel port can be configured for different standards. Moreover, there's a serial peripheral interface (SPI) for control.

...for Consumer Imaging.
Late last year, Philips Semiconductors introduced the TDA8754 triple 8-bit video data converter for liquid-crystal-display (LCD) monitors, projectors, and televisions. The IC accepts either analog RGB or YUV signals and converts them to digital output for use in either high-speed flat-panel displays with resolution up to QXGA (2048 by 1536 at 85 Hz) or in high-definition television receivers. At the input end of the imaging chain, Analog Devices maintains a robust portfolio of AFEs customized for a range of CCD and CMOS digital imagers.

...for General-Purpose AFEs.
Several companies, including Analog Devices, Linear Technology, Maxim, and Silicon Labs, employ silicon CMOS to add programmability to instrumentation-type ADCs. The difference is in the style of programmability—state machine or MCU.

Todd Nelson, Linear Technology's product marketing manager, says the company's ADCs with pin-strap programmed multiplexers on their inputs are popular with engineers who design process-control systems or sensors. These engineers don't want to spend design time mating a separate multiplexer with their ADC.

Different vendors have different approaches to multiplexed-ADC AFEs. These include pin-strap or register-controlled (via a serial interface) programming and single or multiple data converters.

In Linear's LTC1850/51, an on-chip eight-channel multiplexer feeds a 10- or 12-bit, successive-approximation ADC (Fig. 3). The AFE features a scan mode that will repeatedly cycle through all eight multiplexer channels and is programmable with a sequence of up to 16 addresses and configurations that can be scanned in succession. It's also possible to read back the sequence memory. All of this is controlled by strapping the appropriate pins on the AFEs' packages.

The 8- and 10-bit members of the LTC1850 family each boast a pair of single, successive-approximation ADCs with a built-in 8-channel multiplexer. Absolute sampling rates are on the order of 1.25 Msamples/s. However, actual rates depend on how many inputs are being sampled. That is, if the design called for only two input channels, each would be connected to four of the multiplexer's inputs, and the effective sampling rate for each channel would be 625 ksamples/s. With a different input on each multiplexer channel, throughput would be 156 ksamples/s.

A similar design concept (with a specific application focus) lies behind Analog Devices' AD7266. The device integrates two separate 12-bit, successive-approximation ADCs, which allow for simultaneous sampling and conversion of two channels with throughput rates to 2 Msamples/s. Each ADC is preceded by a three-channel multiplexer, as well as a low-noise, wide-bandwidth track-and-hold amplifier that can handle input frequencies in excess of 10 MHz. Every ADC has two analog inputs, and there are three fully differential pairs or six single-ended channels that can be programmed. The conversion result of each channel can be read simultaneously on separate data lines or in succession on one data line.

Maxim's MAX1402 multiplexes fewer signals but exhibits greater resolution, with a delta-sigma modulator followed by a digital decimation filter to achieve 16-bit accuracy (Fig. 4). The digital filter's user-selectable decimation factor allows the conversion resolution to be reduced in exchange for a higher output data rate. True 16-bit performance is achieved at an output data rate of up to 480 sps.

The MAX1402's input multiplexer can be set to manage three fully differential signals or five pseudodifferential signals. The multiplexer is followed by two chopper amplifiers, a programmable-gain amplifier (PGA) (with gain from 1 to 128), a coarse DAC to remove system offset, and a second-order delta-sigma converter. The 1-bit data stream is then filtered with an integrated digital filter configurable as SINC1 or SINC3. The conversion result is made available via an SPI/QSPI-compatible, three-wire serial interface.

Representing the alternative "big-D, little-a" approach, Silicon Labs' C8051F350 is the company's latest 8051-compatible MCU with an on-chip ADC. It integrates an eight-channel, 24-bit, 100-ksample/s converter with a 50-MHz CPU. Peripherals include dual 8-bit DACs and a temperature sensor. Among the on-board serial communication peripherals are UART, SPI, and SMBus serial ports.

Similarly, Microchip Technology's PIC16F684, PIC16F688, and PIC12F683 PIC-based MCUs incorporate 10-bit successive-approximation ADCs with eight-input multiplexers.

Significantly more complex, Cypress Semiconductor's pSoC family members offer a set of complex digital and analog blocks that are totally in-circuit reprogrammable. Cypress' director of strategic marketing, Nathan John, says that a pSoC IC's analog blocks may include up to four ADCs (with 6- to 14-bit resolution, selectable as pipelined, delta-sigma, and successive approximation); two-, four-, and six-pole band-pass, low-pass, and notch filters; 6- to 9-bit DACs; and PGAs.

According to John, Cypress' pSoC design tools include models for two preconfigured delta-sigma converters. One has 8-bit resolution and 643 oversampling and suits up to 32 ksamples/s. The other offers 11-bit resolution and 2563 oversampling and is usable up to 7.8 ksamples/s.

Apart from products such as Silicon Labs' chip, which is more of an MCU with an ADC peripheral, and Cypress' pSoC structured ASICs, most chip makers deliberately limit the digital content of their AFEs. Analog Devices' product manager Curt Wise and senior applications engineer Paul Hendriks say there are multiple reasons for steering clear of a full system-on-a-chip (SoC) implementation. First of all, process technologies could be best suited for analog but not digital. Moreover, as chip designs move from older to newer processes, the silicon real estate taken up by the analog part of the chip doesn't shrink as fast as the digital territory.

Finally, combining too high a degree of digital and analog functionality on the same die in a cutting-edge process technology increases the risk that the first spin of the new design won't meet spec. That would mean another spin and additional mask charges. In an application-specific AFE, the risk can only be accepted if the system requirements for data-converter performance are modest and the potential sales volume is high (tens of millions of units shipped per year).

The cable modem market would then qualify for the full SoC treatment. But in broadband wireless and the emerging powerline communications market, relatively modest potential sales volumes and the need for high converter performance dictate "big-A, little-d" chip partitioning. (Streaming high-definition TV, for example, requires on the order of 70-Mbit/s throughput.) These AFEs are built on mature process technologies—0.13 or even 0.18 mm. They consist of primarily analog functionality with only an appropriate amount of digital functionality. The system's digital heavy lifting takes place in a separate digital chip built on a more advanced process technology.

So in wireless applications, precisely how much digital functionality is generally added to the data-conversion function in an AFE? Wise and Hendricks note that in the transmit channel, there will often be a digital interpolation filter ahead of the DAC. Interpolation increases the DAC's conversion rate, and the higher the conversion rate, the simpler the anti-aliasing filtering required on the DAC output.

Building the interpolation into the AFE is relatively simple, so it makes sense to transfer that functionality there and simplify the digital host chip feeding it. It also means the interface between the chips can run more slowly, removing a potential electromagnetic-interference source.

Analog Devices' AD9862 is a dual 12/14-bit, 128-Msample/s sampling ADC with decimation filters and a digital Hilbert filter. When the filter is enabled, it implements a Hilbert transform, splitting single-channel input data into its I and Q components that can be used as part of an image rejection architecture. The complex data can then be processed further using the on-chip digital complex modulators. Some AFEs may also include direct digital synthesis and digital mixers so that signals can be upconverted in the digital domain before going to the DAC.

In the receive channel, delta-sigma conversion implicitly involves digital filtering. Delta-sigma conversion is particularly useful in narrow-band wireless applications because it provides a high level of selectivity and very high instantaneous dynamic range (see "Digging Deeper: The ABCs Of AFE ADCs" for a discussion of ADC architecture tradeoffs, p. 54).

Engineers who follow converter architectures may be surprised to find delta-sigmas used at frequencies all the way up to multi-megahertz. Historically, delta-sigmas first targeted high-resolution, slow-response applications like weight scales. Later, they were applied to audio applications. Advances in process technologies now let delta-sigmas increase the speed of the sampler core to as much as 20 Msamples/s, which pushes the effective bandwidth to 2.5 MHz, while providing as much as 16 effective bits of resolution.

On the other hand, although delta-sigma conversion is attractive in narrow-band wireless applications such as voice communication over discrete RF channels, the architecture isn't appropriate for wideband applications. Rather, successive-approximation converters are usually employed for moderate- to high-speed wideband applications in industrial control and measurement. It's now common to find 16-bit, 300-Msample/s successive-approximation converters.

They're inexpensive to implement, so pipeline converters are found in applications needing only 8- or 10-bit resolutions and up to 10-Msample/s conversion rates. Pipelines introduce latency but are silicon-efficient. Building a 12-bit converter with a latency of one would require 4095 comparators and a huge die and result in a chip drawing a lots of power.

In contrast, by converting in stages, a pipeline converter can be realized with far fewer comparators—at the cost of six or seven cycles of latency. But latency is only a potential problem in feedback-loop control systems. It's not a problem in communications systems, though, because the converter's latency is a trivial part of the sum of all the delays in the whole signal chain.

Earlier, the reasons for integrating interpolation filters ahead of DACs were discussed. Though Maxim's MAX1402 incorporates a decimation filter after its delta-sigma converter, don't expect to find one on the output of a pipelined ADC. Economically, it makes more sense to insert a surface acoustic wave filter and another filter in the analog domain when using an inexpensive ADC.

Need More Information?

Analog Devices Inc.

Cypress Semiconductor Corp.

Linear Technology Corp.

Maxim Integrated Products

Microchip Technology Inc.

Philips Semiconductors

Silicon Laboratories Inc.


Texas Instruments Inc.

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