Wireless Systems Design

Base Stations Gain Signal-Processing Might

Both equipment manufacturers and network operators are facing problems like rising costs and competing interface standards. Their only chance of profits may be to find a more flexible approach to baseband processing. This dilemma has inspired a number of companies to come up with alternatives. Not surprisingly, the majority of their work leans toward a software-oriented approach. For example, Analog Devices, Inc. (www.analog.com) has been looking into swapping out pricey ASICs and FPGAs in exchange for a software-defined-radio (SDR) platform. For help in implementing such an approach, look to the company's new generation of TigerSHARC processors.

The ADSP-TS201/202/203 processors all work to provide designers with a new platform. Upon that platform, they can build high-performance and memory-intensive signal-processing and imaging applications. They can then take advantage of the benefits of low power consumption, low cost, and seamless multiprocessing in a software-programmable digital signal processor (DSP). Among the key applications for this processor are full software-radio implementations in 2G, 2.5G, and 3G wireless base stations.

The new TigerSHARC processors are able to make such promises because they satisfy performance density. They deliver up to 1800 MFLOPS per Watt, 85 MFLOPS per dollar, and 3600 MFLOPS per square inch. As software-programmable processors, they also enable IP reuse. These devices can be programmed in C/C++ and/or in assembly language. They may therefore enhance R&D productivity through each successive product generation. This programmability also lowers product-maintenance costs, as designers can remotely upgrade systems that are already in the field.

In addition, the new TigerSHARC members claim the industry's highest levels of fixed-point and floating-point signal-processing performance. Respec-tively, they achieve 4.8 billion multiply accumulates per second (GMACS) and 3.6 billion floating-point operations per second (GFLOPS) at 600 MHz. Through a balanced architecture, the ADSP-TS201/202/203 promise to deliver higher levels of performance than competing processors operating at up to twice the frequency. Through fabrication and design collaboration with IBM Microelectronics (www.ibm.com), the devices integrate 24 Mb of embedded DRAM on a DSP. They claim to deliver three times the memory integration of competing processors. When coupled with internal bandwidth of up to 38.4 GBps, this large internal memory works to achieve higher performance.

This TigerSHARC generation represents just one processor breakthrough. As signal processing evolves, it will continue to bring down base-station system costs. It also will save time and space while enabling more flexible infrastructure platforms. It should only be a matter of time before the current base-station dilemmas are resolved. For more information on the ADSP-TS201/202/203, visit www.analog.com/tigersharc.

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