Electronic Design

# Build IF/AGC Amp With Four Parts

An IF/AGC amplifier that features an 82-dB AGC range can be built using just four active components (see figure). It uses a simple two-transistor peak detector (the transistors, 2N3904 and 2N3906, are commonly available and low cost).

The peak detector consists of Q2, a temperature-dependent current source, and Q1, a half-wave detector. Q2 is biased for a collector current of 300 µA at 27°C; the temperature coefficient is 1 µA/°C.

The current into capacitor CAV is the difference between the collector currents of Q2 and Q1, which is proportional to the output signal's amplitude. The automatic gain control voltage, VAGC, is the time integral of the error current.

For VAGC (and thus the gain) to remain insensitive to short-term amplitude fluctuations in the output signal, the rectified current in Q1 must, on average, exactly balance the current in Q2. If the output of A2 is too small, VAGC will increase. This in turn causes the gain to increase until Q1 conducts and the current through Q1 balances the current through Q2.

To illustrate further, first consider the case when R8 is zero and the output voltage Vout is a squarewave at, say, 455 kHz (which means it's well above the corner frequency of the control loop). During the time Voutis negative with respect to the base voltage of Q1, Q1 will conduct. When Vout is positive, Q1 cuts off. Because the average collector current of Q1 is forced to be 300 µA and the squarewave has a duty cycle of 1:1, Q1's collector current when conducting must be 600 µA.

Because Q1's average emitter current is 600 µA during each half-cycle of the squarewave, a resistor of 833 Ω would add a PTAT (proportional to absolute temperature) voltage of 500 mV at 300 k, increasing by 1.66 mV/°C. In practice, the optimum value will depend on the type of transistor used, and to a lesser extent, on the waveform that optimizes the temperature stability. For the 2N3904/3906 pair and sinewave signals, the recommended value is 806 Ω.

The 1.8-kHz low-pass filter which R8 forms with C2 reduces distortion due to ripple in VAGC. The output amplitude under sinewave conditions will be higher than for a squarewave, since the average value of the current for an ideal rectifier would be 0.637 times as large. As a result, the output amplitude would be 1.88 (= 1.2/0.637) V, or 1.33 V rms. In practice, the somewhat non-ideal rectifier result in the sinewave output being regulated to about 1.4 V rms, or 3.6 V p-p.

The entire circuit operates from a single 10-V supply. Resistors R1, R2, R3, R4 bias the common pins of A1 and A2 at 5 V. This pin is a low-impedance point and must have a low-impedance path to ground. In the circuit shown, it's provided by the 100-µF tantalum capacitors and the 0.1-µF ceramic capacitors.

The gain of A1 and A2 is set at 42 dB for an overall gain of 84 dB. They operate in sequential gain, which means that the gain of A1 goes from minimum to maximum and then A2's gain does the same. This is beneficial because first, the signal-to-noise ratio is at its maximum for as long as possible, and second, the signal strength in dBm can be determined from the AGC voltage (the gain changes at 40 dB/V). The gain is 0 dB for VAGC ≈ 5 V, and 82 dB VAGC ≈ 7 V. In the circuit, the gain-control offset voltage between pins 2 (GNEG) of A1 and A2 is 1.05 V (42.14 dB &times; 25 mV/dB), which is provided by a voltage divider consisting of R5, R6, and R7.

The circuit's bandwidth exceeds 40 MHz and can be used at any of the standard IFs (such as 455 kHz, 10.7 MHz, or 21.4 MHz) within this range. At 10.7 MHz, the AGC threshold is 100 µV rms (—67 dBm) and its maximum gain is 83 dB (20 log 1.4 V/100 µV). The circuit holds its output at 1.4 V rms (3.9 V p-p) for inputs as low as —67 dBm to as high as +15 dBm (82 dB), where the input signal overdrives the amplifiers. For a —30 dBm input at 10.7 MHz, the second harmonic is 34 dB down from the fundamental and the third harmonic is 35 dB down.