Bus Buffers Make Connection On Command

The LTC4302 and LTC4302-1 addressable I2C- and SMBus-compatible bus buffers provide capacitive buffering, rise-time acceleration, and on-demand input-to-output connection control using two-wire bus commands. They provide electrical isolation between backplane and peripheral board until the VCC supplies are valid and the IC receives the two-wire bus command. One of 32 possible I2C addresses can be selected via an external resistive divider connected to the address pin. The chips provide capacitive buffering for I2C buses connected across the backplane. This is said to enable the backplane bus to see only the chips’ capacitance (about 10 pF). LTC4302-1 provides two GPIO pins that can be configured as inputs, open-drain outputs, or push-pull outputs, while LTC4302-2 replaces one GPIO pin with a second supply voltage pin for level shifting between different supply voltages. Housed in 10-pin MSOPs, the bus buffers have a starting price of $2.50 each/1,000. More details are available from LINEAR TECHNOLOGY CORP., Milpitas, CA. (800) 454-6327.