Electronic Design

DAC Minimizes Cable Head-End Signal-Chain Footprint

The 11-bit AD9737A digital-to-analog converter (DAC) from Analog Devices enables cable television and broadband operators to synthesize the entire cable spectrum up to 1 GHz into a single RF port. It also operates from 1.8-V and 3.3-V supplies for 1.1-W maximum power consumption.  

The DAC’s wide bandwidth and dynamic range can enable cable infrastructure designers to increase quadrature amplitude modulation (QAM) channel density by 20 times over present cable modem implementations, enabling improved next-generation services such as interactive television, high-definition broadcasts, and new specialty channels.

The 11-bit, 2.5-Gsample/s AD9737A DAC from Analog Devices can synthesize wideband signals from dc up to 3 GHz. The 14-bit AD9739A also is available. The AD9737A is manufactured on a 0.18-μm CMOS process and operates from 1.8- and 3.3-V supplies.

The AD9737A’s low noise and intermodulation distortion enable high-quality synthesis of wideband signals up to 1 GHz, reducing the number of transmit DACs required in the typical cable plant. Its dual-port interface with double-data-rate (DDR) low-voltage differential signaling (LVDS) data receivers supports the maximum conversion rate of 2.5 Gsamples/s. The source-synchronous interface also simplifies the digital interface with existing FPGA/ASIC technology.

Furthermore, the company’s proprietary switching technique enhances dynamic performance. Output current is programmable from 8.7 to 31.7 mA, adding flexibility in interface options. Also, the AD9737A isn’t subject to U.S. data converter export restrictions.

The AD9737A can synthesize high-quality wideband signals with bandwidths of up to 1.25 GHz in the first or second Nyquist zone. A proprietary quad-switch DAC architecture provides exceptional ac linearity performance while enabling mix-mode operation.

On-chip controllers manage external and internal clock domain skews. They also simplify system integration. They’re used to manage external and internal clock domain variations over temperature to ensure reliable data transfer from the host to the DAC core. A serial peripheral interface (SPI) is used for device configuration as well as readback of status registers.

Samples and full production quantities of the AD9737A are available now. It costs $37.14 in 1000-unit quantities. It comes in a 160-ball chip-scale ball-grid array (CSBGA). The complementary ADCLK914 clock/data buffer drives the AD9737A’s clock input with a 2-V differential swing that achieves 110-fs jitter performance.

Analog Devices Inc.  

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