Electronic Design

Dual-Input, 8-Bit, 1-Gsample/s Fold-And-Interpolate ADC Wrings 7.5-Bit Effective Number Of Bits From 1.6 W

At $219 each in 1000-unit volumes, the ADC08D1000 analog-to-digital converter (ADC) isn't destined for consumer products. But this chip from National Semicondctor can digitize two input signals to 8-bit resolution at sampling rates up to 1 Gsample/s while consuming just 1.6 W from a 1.9-V nominal supply. Thus, it has possibilities in digital oscilloscopes, automated test equipment, basestations, satellites, and communications systems that need direct I/Q down-conversion. In fact, by using its fully programmable dual-edge sampling feature, system designers can achieve 2 Gsamples/s from one channel by interleaving the two on-chip converters.

The ADC08D1000's low power demand comes from a folding and interpolating architecture. Folding reduces the number of comparators, and interpolation cuts the number of front-end amplifiers required. An internal sample-and-hold and self-calibration yield a 7.5 effective number of bits (ENOB) with a 500-MHz input signal and a 1-GHz sample rate while providing a 10- to 18-bit error rate. Differential nonlinearity and integral nonlinearity are 0.25 and 0.35 LSB, respectively. Measured crosstalk between the I and Q channels is below ­77 dB. The ADC has an ideal pulse response and guarantees "no missing codes" over the full operating-temperature range of ­40°C to 85°C. Full production release is planned for January 2005

National Semiconductor

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