No means for waveform synthesis is more flexible than the arbitrary waveform generator (AWG). In this marriage of digital and analog, large memory arrays that contain a separate datum for each point in the desired waveform are clocked into DACs that directly generate the desired output signal. AWGs can produce even the most obnoxiously complicated composite waveforms, eliminate manual trimming of waveform parameters, and handle applications requiring multiple synchronized output channels.
The little AWG described here (see the figure) was designed (development sponsored by NASA/JPL, Pasadena, Calif.) to generate, in parallel, the two rather complex laser drive waveforms required by a dualchannel tunable diode laser infrared spectrometer. Two copies of this circuit flew as part of the Mars Volatiles And Climate Surveyor (MVACS) science payload of the NASA Mars ’98 Polar Lander, which launched this past January.
In spite of their versatility, widespread use of AWGs is limited, particularly in small-scale cost-sensitive (e.g., non-aerospace) applications, by several factors. These factors boil down to the complexity of the AWG circuitry itself and of the means necessary for downloading the waveformdefining data. This circuit employs techniques that address both of these issues. The result is a relatively simple and inexpensive AWG that’s suitable as a replacement for an analog function generator in many situations.
One enabling feature is the use of nonvolatile waveform memory (AMD’s 20F020A, a 2-Mbit electrically-erasable flash ROM). This allows convenient in-circuit downloading of waveshape information during final calibration and alignment, while eliminating the necessity of rewriting waveform memory in the field after the AWG is placed into service. A relatively simple programming connection (J1) to the ROM (U4) I/O pins and the scan clock (Y1) implements a lowpad-count interface. This enables interactive access to ROM locations via waveform download software running on a standard PC.
Substantial reductions in AWG digital hardware complexity are realized through the use of serial-input DACS. Serial DACs minimize the complexity of the interconnection between the ROM and the DACs and greatly simplify translation between the formats of ROM data (8 bits per word) and DAC data (12 bits per word). In addition, the “daisy-chain” feature of the LTC1257 DAC is exploited to further simplify implementation of a dual-channel AWG function. Serial data is simply allowed to stream through U6 into U7. In this way, the ROM data self-organizes into blocks of four bytes. Each block comprises one data point for both DACs (see the table).
The “unused” byte in each block isn’t as big a waste as it may seem. It creates significant simplifications of the AWG address logic and provides a ready means for upgrade to 16-bit DACs (e.g. the LTC1596). The result is that decoding of the least significant ROM seven address bits by U3 is all that’s needed to generate simultaneous DAC load/update strobe pulses.