Mine These High-Speed ADC Layout Nuggets For Design Gold

Sept. 15, 2011
Understanding the mechanisms that affect the performance of high-speed signal chain designs is imperative. Some examples are IC grounding, decoupling and plane capacitance, plane coupling, and splitting grounds.

High-speed design can be overlooked or overly vital. The layout of the system board has become an integral part of the design itself. Therefore, it is paramount that we understand the mechanisms that affect the performance of our high-speed signal chain designs.

As engineers, though, we tend to “make” more problems than we really have. So, try not to be too critical and push your CAD engineer to the brink of insanity for things that don’t buy your design any improvement in performance.

Don’t Forget The Epad

The epad sometimes becomes an overlooked item that’s essential in getting the most performance out of the signal chain and heat out of the device. The epad, or pin 0 as we call it at ADI, is the paddle found underneath most parts today. This is an important connection, as it generally ties all internal grounds from the die to a central point under the part.

Have you noticed a lack of ground pins in many converters and amplifiers today? The epad is why. The key is to get this pin tied down—i.e., soldered—well to the printed circuit board (PCB) to make a robust electrical and thermal connection. If not, there can be all sorts of havoc in your system design.

There are basically three steps to achieving the best connection, electrically and thermally, with the epad. First, if possible, replicate the epad on each PCB layer. By doing so you create a thick thermal connection to all grounds and ground layers so the heat can dissipate and spread out quickly.

This is pertinent for those high-power parts and for applications that have high channel counts. Electrically this provides a nice equal connection to all the ground layers. You can even replicate the epad on the bottom layer (Fig. 1). This can serve as a thermal relief ground point for decoupling and a placeholder to attach a heatsink on the bottom side.

Notice that if a layout allows you to keep the respective circuits in their own areas, then there’s no need to split the ground. Partitioning this way allows for a star ground that, therefore, keeps return currents localized to that particular circuit section. One split example is when a form factor restriction prohibits good layout partitioning. This could be because the dirty bus supplies or noisy digital circuits must be located in certain areas to conform with a legacy design or form factor. In that case, splitting the ground plane may make the difference in achieving good performance.

However, to make the overall design work, a bridge or tie point is required to connect the grounds together somewhere on the board. With that being the case, spread the tie points evenly across the ground plane split.

One tie point on the PCB often ends up being the optimum place for the return current to pass without reducing performance or forcing return currents to couple to sensitive circuitry. If this tie point is at or near or under the converter, you didn’t need to split the grounds in the first place.

Conclusion

Layout considerations can always be confusing because there are a lot of opinions on what is best. Techniques and philosophy tend to become part of the ”design culture” of the company. While engineers tend to use what worked in their previous designs, possibly influenced by the “old analog guru” in the back office, designers often are reluctant to change or try new things because of time-to-market pressures. This leaves them in the position of weighing tradeoffs with risk until something really does go wrong in the system.

At the evaluation board, module, and system level, a simple single ground works best in all cases. Good circuit partitioning is key. This also extends into plane and adjacent layer layout. Keep in mind that cross coupling can occur if sensitive planes are just above those noisy digital planes.

Assembly is important too. Use the fabrication notes given to the PCB house or assembly house to your advantage to ensure that the connection between the IC’s epad and PCB is solid. All too many times, poor assembly leads to poor system performance.

Decoupling close to both the power plane entry point and the VDD pins of the converter is always good, though. For added, inherent high-frequency decoupling, take advantage of tight power and ground plains of 4 mils or less. There is no extra cost for this except for the extra five minutes it will take to update your PCB fabrication notes.

There is no way to cover all the specifics when designing a high-speed, high-resolution converter layout. Each application is different and sometimes unique. However, these key points will be useful to designers in better understanding their future system designs.

References

1. Analog-Digital Conversion: Seminar Series, Walt Kester, Analog-Digital Conversion, Analog Devices, 2004, ISBN 0-916550-27-3; also available as The Data Conversion Handbook, Elsevier/Newnes, 2005, ISBN 0-7506-7841-0

2. AN-772: Gary Griffin, A Design and Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP)

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