To borrow a line from the Talking Heads' David Byrne, the basic digital-to-analog converter (DAC) is the same as it ever was. In today's designs, though, DACs rarely stand alone. They tend to be integrated into codecs and directdigital-synthesis (DDS) chips.
Codecs constitute a major new market for dc-enabled baseband devices, particularly for signal decompression in cell phones and personal media players.
Meanwhile, one thing is new. Engineers are pushing DACs to conversion rates greater than 1 Gsample/s for direct synthesis of RF signals. The challenge they were at last able to deal with concerns the timing of the switch elements inside the DAC. At high conversion rates, picosecond misalignments between the DAC switches create unacceptable signal distortions.
Other challenges at high conversion rates include dealing with parasitic capacitance and routing inductance. Unlike RF discretes, where signal paths can be kept short, up to 10,000 elements can contribute parasitics with a high-resolution DAC. Furthermore, the data-conversion clock no longer can be an external clock provided by the DSP board at conversion rates above baseband. The clock becomes like the local oscillator for a mixer, and it must be held to sub-picosecond jitter performance.
GENERAL AUDIO CODECS
Because they meld the functionality of personal media players, cameras, recorders, and cell phones, the latest consumer products need audio converters that provide hooks for many different telephony and digital entertainment compression and encoding schemes.
Consider how newer cell phones may integrate digital signal processing to eliminate wind noise. Or they may integrate drivers for Class D power amplifiers, whose output stages can support speaker phones or external multimedia speakers.
Meanwhile, OEMs crafting the next batch of handheld media devices are demanding signal-to-noise ratios (SNRs) and dynamic range specs that are historically considered audiophile-class. For example, they may require an SNR greater than 100 dB.
I asked several codec-savvy engineers if the iPod is driving codecs toward ACC instead of MP3. Most expect demand to seesaw between the two, implying that a general programmable-DSP or ARM-based solution seems to be a better response than a hardwired solution for now. In fact, they said, any application-specific standard product (ASSP) designated for ACC or MP3 probably will even have a programmable core. This contrasts with the decoding of video-compression standards, where dedicated hardware holds the advantage.
AUTOMOTIVE AUDIO CODECS
Automotive audio applications now require codecs with large channel counts, such as eight in/16 out. Input channels might comprise decoded DVD audio, 7.1 or 5.1 multichannel audio, chimes, and in-car cell-phone and remote help systems. In addition, provisions must be made for the multiple headphones scattered around the cabin, so passengers can listen to their own programs. And, channels are available for active noise cancellation (ANC) of road and engine noise.
In today's cars, DACs can be used to generate chimes that remind drivers they've left their headlights on. Amusingly, these signals also can generate a synthesized version of the old click-clack relay noise indicating that the turn signal has been left on.
Intercoms between the front and back seats of vans can work with the in-car video system headsets. That's particularly useful when parents need to say "Don't make me come back there!" to rambunctious kids. Of course, back channels will let these kids snitch on their siblings, too.
DACs IN DDS
Direct digital synthesis (DDS) couldn't exist without DACs. Today, it has become an integration play on the DAC itself. Chip companies have taken what used to be a multichip function and integrated it. They may even integrate as many as four DDS channels onto a single chip while slashing power consumption per channel, pushing clocks as high as 500 Msamples/s and updating the frequency control word more than 30 times faster than in older DDS chips.
Higher levels of integration are important because many systems designers now use multiple synchronized DDS sources. When all of the DDS functions reside on the same chip and are fed from a single clock, they're inherently synchronous.
Another driver of DDS technology involves the growing popularity of satellite radio, with the RF band up around 2 GHz. Most consumer satellite radio receivers today are superheterodyne, with DDS for the local oscillator (LO). However, many OEMs are looking at direct conversion, because it provides economies in the filter stages.
Digital downconversion is performed either via decimation or with a numerically controlled oscillator (NCO) functioning as a digital mixer. While such DDS technology has been possible for some time, it's only now becoming common.
A new technology driver for DDS, the acousto-optic tunable filter (AOTF), takes an incoming optical data stream and "bends off" specific frequencies by distorting a piezoelectric element that functions as a sort of tunable grating. The DAC output from the DDS drives the piezo element.
One other driver for synchronous multi-DDS chips is phased-array radar, where multiple DDS chips simplify the aiming of the radar beam. Current products from some suppliers support phase resolution to 0.01° or better.
In terms of clocking, 1 ps of rms jitter in an integrated solution used to be quite a challenging barrier for designers to leap. That has changed. In fact, the 300-fs barrier fell in 2005. Currently, it looks like 100 fs will be surpassed in 2006.
Can jitter really be squeezed to 100 fs? It can, and the technique reveals something about system designers' real concerns with respect to jitter. It all comes down to phase noise.
For most RF applications, phase noise is the critical spec, not jitter per se. But in applications such as medical imaging, jitter is the key spec. So, it's necessary to be able to report characteristics in both the time and frequency domains.
Scheduled for Feb. 4-8 in San Francisco, this year's International Solid State Circuits Conference (ISSCC) has only three papers dealing with DACs. For example, Arizona State's Connection One Research Center offers "A Bandpass ΣΔ RF-DAC with Embedded FIR Reconstruction Filter."
It describes a single-bit, bandpass, delta-sigma DAC followed by a currentsteering finite-impulse response reconstruction filter with an embedded upconversion mixer. The DAC targets lowpower, software-definable, digital-IF transmitter ICs. The authors say that phase-aligning LO nulls to IF clock transitions minimize signal-dependent glitches at the IF output.