Multiplying Digital Synthesizer

April 3, 2000
Many applications, such as Doppler radar receivers, EW systems, etc., require coherent frequency synthesis. Direct digital synthesis, an important technology of frequency synthesis, is popular due to its excellent frequency accuracy and agility,...

Many applications, such as Doppler radar receivers, EW systems, etc., require coherent frequency synthesis. Direct digital synthesis, an important technology of frequency synthesis, is popular due to its excellent frequency accuracy and agility, very fine frequency and phase resolution, broad output bandwidth, and low phase noise. However, every frequency hop is executed in phase-continuous (not coherent) mode. This idea addresses the coherence problem.

Conventional direct digital synthesizers (DDSs) use a phase-accumulator section, normally constructed with a binary accumulator made up of an adder and a latch. It can add the binary increment word, N, to the content of the phase accumulator. This produces a series of binary integer values corresponding to the progression of the synthesized sine-wave phase, or mathematically performing:

R(i) = R(i − 1) + N      (1)

where R(i) represents a binary number corresponding to the phase value, and i is a natural number of the time index.

The phase value in radians, P(i), is:

P(i) = R(i) * 2 * pi / 2n
      = R(i) * pi / 2n-1

where n is the increment word's length.

Equation 1 can be written as R(i) = N * i. Also, phase value, P(i), in radians can be written as:

P(i) = R(i) * pi / 2n−1
      = N * i * pi / 2n−1

or P(i) = N * P(i)REF      (2)

where P(i)REF = i * pi / 2n−1 is a referent phase signal.

Equation 2 determines the operation of the phase generator. It's evident that the phase generator can be implemented with a simple n-bit binary counter and digital multiplier.

To construct a multiplying digital synthesizer (MDS), it's necessary to combine a phase generator (instead of a phase accumulator) with a ROM lookup table and a DAC (see the figure). The MDS output frequency, fOUT, as well as DDS output frequency is: fOUT = (fCLK / 2n) * N, where fCLK is the clock rate.

The principal, and the only, difference of an MDS when compared to a conventional DDS is a phase-coherent frequency-switching ability. A DDS, on the contrary, produces only a phase-continuous frequency-switching type of signal.

The traditional approach to generating a coherent switching signal is based on parallel banks of VCOs (i.e., separate, continuously running oscillators that switch in and out as necessary). An MDS synthesizer with all of its advantages can do just this.

For example, to construct a digital 2n−1 local-oscillator bank, it's sufficient to combine an n-bit counter; n * n = n−ls_bit multiplier; a (2n) * k-bit sine-wave ROM; a k-bit DAC; and a low-pass filter. The signal-to-noise ratio (SNR) of this coherent oscillator will depend only on k, according to an approximate formula like that shown here: SNR=6 * k dB.

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