Most buffer amplifiers use some kind of “follower” circuit such as a BJT or a MOS in a common-collector or common-drain configuration. Such transistors, however, have a finite transconductance (gm) (see the figure, a) that appears as a resistance in series with the emitter (or drain) of the active element.
This additional resistance has two main effects. First, it reduces the circuit’s gain below unity under load. Second, it introduces some nonlinearity. The nonlinearity arises because the transconductance is not constant but varies with output current level.
The usual cure for obtaining more precision when the gain loss and nonlinearity can be problematic is to incorporate the buffer into the feedback loop of a high gain amplifier. Increased circuit complexity and the introduction of stability issues are drawbacks to this cure, though.
An alternative approach to cancelling the effects of the additional resistance, which appears as a parasitic voltage (VΔ) between the input and output terminals, is to insert a voltage source that exactly mirrors this unwanted voltage. A triplet of N-devices grouped in line (Tringl) (see the figure, b) is a relatively simple circuit that produces an equivalent result. The analysis of this “Tringlotron” stage, however, is not simple. The circuit hides a convoluted and counter-intuitive behavior behind its deceptively simple appearance.
Transistor Q1’s emitter voltage reproduces the input voltage (with more or less accuracy) and then drives Q2’s base through a level-shifting diode. Transistor Q2 drives the load, and the resulting current returns through Q3, which is operating as a folded cascode.
What is unusual here is that the relative phase of current and voltage is reversed compared to a normal, resistive impedance. In effect, Q1 sees a negative resistance at its emitter. This reversal means that the modulation of Q1’s base-emitter voltage is also reversed with respect to a regular emitter-follower stage, producing the equivalent of an “anti-error” voltage.
This anti-error voltage appears together with the input voltage at the load’s upper terminal. Transistor Q2 does not produce any additional error because Q1’s collector current exactly cancels the load current so no current flows through Q2. The load’s other terminal sees Q3’s emitter voltage, where a normal error voltage has appeared.
The net result is a cancellation of the two error voltages across the load. Because the transistors are series-connected, they all carry the same current, achieving a perfect compensation—at least to the first order.
In the real world, second-order effects limit the compensation’s accuracy. For instance, transistors require a base current due to their finite beta, and the Early effect adds parasitic resistances across the transistors, creating additional error voltages.
Nevertheless, the Tringlotron circuit offers impressive performance. By carefully choosing the transistors’ VCE parameters, designers can also achieve second-order compensation. The circuit shown here exhibited a 50-fold performance improvement (d < 60 ppm) over a classic follower (d = 3400 ppm).
The Tringlotron does have some awkward features. One obvious drawback is that the load cannot be grounded, which somewhat limits the possible applications. Further, the circuit’s input impedance, though comparable to that of a classic follower, is negative. This negative impedance means designers must control and define at all frequencies the input signal’s source impedance to avoid instabilities.
The principle behind the Tringlotron is applicable to any active device, however, including triode vacuum tubes, making the approach ideal for high-end audio product designs. Actual performances will mainly depend on the degree of matching among the active elements, especially Q1 and Q3. For optimum results, these two transistors should be a monolithic pair.
At the very least, they should closely match parametrically and be in thermal contact to match environmentally. Bias voltages influence the second-order compensation and may need adjustment according to the device type and geometry.