A simple linear voltage-controlled amplifier can be constructed with one op amp and two JFETs *(see the figure)*. The amplifier can achieve an 80-dB dynamic control range with less than ±0.2% linearity error for 0 V ¾ V_{C} ¾ 0.8 × V_{P}.

JFETs act as linear resistors over a very small range of drain-to-source voltages (the ohmic region). In this circuit, an op amp constrains the drain-to-source voltage excursions to a few tenths of a volt.

R is chosen to be much larger than the R_{DS(ON)} of the JFETs. This permits a large range of input voltages to be applied without driving the JFETs into a nonlinear region. If, for example, R_{DS(ON)} = 100 O and R is chosen to be 10 kO, a 10-V input signal (V_{IN}) will result in a V_{DS} of less than 100 mV.

The value of k can be chosen to supply gain. Although p-channel JFETs are shown, n-channel JFETs will work as well for negative control voltages (V_{C}). Also, it should be noted that the drain and source terminals are interchangeable in this application.

The JFETs should be chosen for low R_{DS(ON)} and high I_{DSS}. If a forward gate voltage is possible, a current limiter in the gate is advisable.

For the largest dynamic range, the resistor connected from V_{IN} to the noninverting input can be adjusted for a minimum output with V_{C} = 0 V. The trim range is about ±5% of R. For the lowest temperature sensitivity, maintain good thermal coupling between Q1 and Q2.

If V_{C} = V_{IN}, the circuit will perform as a voltage squaring circuit where V_{O} = —(k/V_{P}) × V_{IN}^{2} for unipolar V_{IN} (quadrant 4 for p-JFET and quadrant 2 for n-JFET).

*Ed. note: A paper showing the full derivation of the gain equation is available. Contact the author via his e-mail address.*