EE Product News

Refresh! Analog-to-Digital Converters

What is an Analog-to-digital converter?

An analog-to-digital converter (ADC) is an electronic circuit that changes or converts a continuous analog signal into a digital signal without altering its critical content.

How does an ADC WORK?
In the simplest terms, an analog-to-digital converter samples an analog waveform at uniform time intervals and assigns a digital value to each sample. A simple ADC is shown in Figure 1.

An ADC carries out two processes. Those processes are quantization and sampling. The quantization process occurs when the ADC represents an analog signal, presumably with infinite resolution, as a digital string of 1's and 0's with finite resolution. The ADC outputs a finite number of digital values, equal to 2N, where N is the resolution sin bits of the ADC. Digital signals are not an exact representation of analog signals. There is an inherent uncertainty. This inherent uncertainty can also be called quantization error. The quantization error outlines the ADC's maximum dynamic range possible.

Sampling is the process of analyzing the continuous analog signal with measurements taken at discrete and standard intervals. This process determines the maximum bandwidth of the sampled signal in accordance with the Nyquist Theorm. This theorem states that the signal frequency should be less than or equal to one-half the sampling frequency to prevent aliasing. Aliasing is a condition in which unwanted signals appear within the bandwidth of interest.

Sampling and quantization establish the performance of a particular ADC. ADC operation in the real world, though, is affected by imperfect conditions. These conditions often produce errors beyond those set by the converter's resolution and sample rate.

Types of ADCs
ADCs can be grouped into many different categories. Architecture type, speed, resolution and power consumption are just a few. Most semiconductor manufacturers have come up with their own categorizations: general-purpose, high-speed and precision are the main categories. Table 1 is a simple reference.

Table 1 is not by any means meant to be definitive; it is more of a guideline to the market. When selecting an ADC, two specifications are usually of most interest: resolution and sampling rate.

But there are others that can affect ADC performance. Signal-to-noise ratio (S/N) and effective number of bits (ENOB) are important as well. If the ADC cannot distinguish between the input analog signal and noise, it will greatly reduce the effectiveness of the ADC. The effective number of bits relates to the resolution of the ADC in bits and how many are distinguishable. Just because someone has selected a 12-bit ADC doesn't mean that all 12-bits will be available for analysis.

There are quite a few ADC architectures in the market today. The most popular types are flash, pipelined, successive-approximation-register (SAR), and sigma-delta (Σ-Δ). Each architecture offers certain advantages with respect to conversion speed, accuracy, and other parameters. The characteristics associated with each architecture help determine its suitability for a given application.

Flash ADCs, sometimes called direct conversion or parallel ADCs, use comparators for each decoded voltage range. The comparator bank feeds a logic circuit that generates a code for each voltage range. Flash ADCs are the fastest converters on the market, but typically achieve only eight bits of resolution or less. An 8-bit flash ADC would need 255 comparators in the circuit. This requires a large and expensive circuit. Therefore, flash ADCs have a large die size, which in turn makes for high power consumption. And they are not the most accurate devices. Applications for flash ADCs include satellite communications, highspeed video and other high-speed data acquisition applications.

A successive-approximation-register or SAR ADC is more complex than some other ADC architectures (see Figure 2), but there are advantages to the complexity. The SAR ADC works by using a single comparator to compare the input analog voltage to an internal reference voltage for each bit in the conversion. So, the input signal needs to be compared eight times for an 8-bit resolution converter. As each comparison takes place, a binary value of the approximation is stored in a register. As comparisons and approximations continue, the register shifts to the next most significant bit until the word is complete. This architecture is not the fastest implementation, but it can provide an accurate approximation of the analog signal. SAR ADCs are typically available in sampling rates less than 5 MSPS, and resolution in the 8- to 16-bit range. A definite advantage is low power consumption and small die size. This makes the SAR ADC ideal for battery powered applications and industrial controls.

The pipeline architecture is a variation on the flash ADC. A pipelined ADC separates the process into several different processes that can be performed in a successive order. Basically, three processes take place within the device. There is a sample-and-hold circuit, a flash ADC, and a digital-to-analog converter. The resolution of the flash ADC and the DAC depend on the resolution of the pipelined ADC as a whole (see process steps below).

The pipelined ADC architecture is an alternative to the large size, power hungry flash ADC. The pipeline ADC can offer high resolution and fast sampling rates, but not as fast as the flash ADC.

Sigma-delta or delta-sigma converters have relatively simple structures. These converters possess a sigma delta modulator in addition to a digital decimation filter. The modulator has an integrator and a comparator with a feedback loop that contains a 1-bit digital-to-analog converter. The sigma-delta ADC also includes a clock that provides timing for the modulator and digital decimation filter. Sigma-delta converters use a technique called oversampling in order to achieve high-resolution outputs. Oversampling reduces the sampling rate of the converter and increases the ADC's resolution. This type of converter is low cost, high resolution and can be incorporated into many system-on-chip designs.

Here is how the pipeline process works:

  1. The sample-and-hold circuit samples the analog input signal.
  2. The flash converter converts the sample to a digital value.
  3. The digital value becomes the most significant bits of the eventual digital output.
  4. This digital value is then fed into a similar resolution digital-to-analog converter, and the analog output signal is subtracted from the original analog signal.
  5. The difference of the two analog signals is then amplified and inputted into the next stage of the pipeline to have the same process repeated as in the first stage.
  6. This process continues until the desired resolution is obtained.

Semiconductor companies in the ADC business
There are many semiconductor manufacturers in the market who make ADCs. Each manufacturer offers a different flavor of architecture, bit sizes and sampling rate. The following list of companies is not the total number of manufacturers in the market, but is a majority representation.

Analog Devices offers a wide variety of ADCs with varying bit widths and sampling rates. Resolutions for their products go from 6 to 24 bits and sample rates from 16 samples per second all the way up to 500 mega samples per second. They specialize in audio ADCs and have some interesting isolated ADCs. There doesn't seem to be a specific architecture that they favor, but they have a decent offering in almost all types.

Maxim Integrated Products has a varying offering as well. They characterize their ADCs as sigma-delta, high sampling speed or medium to fast sampling. Their bit widths go from 6 to 24 bits depending on speed. Their sampling speed goes to a maximum of 5 Msamples/s. They have different architecture offerings that include SAR, flash, integrating and pipeline.

Linear Technologies and Texas Instruments have similar ADC offerings. Their bit widths go from 8- to 24-bit resolutions and sampling rates up to 250 Msamples/s. Their architectures include deltasigma, pipeline and SAR and TI also offers a few flash ADCs. National Semiconductor offers similar ADCs to the other companies already listed. They offer general purpose ADCs from 8- to 16-bits resolution. The added difference with National is that they also have a high-speed product line as well that goes up to 1.5 giga samples per second. This is very high speed.

Atmel offers only very high speed ADCs. Their broadband data conversion product line has products that have resolution bit widths of 8 to 12 bits and sampling rate speeds up to 2.2 Gsamples/s. These are screaming fast and have limited application potential. They can be used in satellite, wireless RF infrastructure equipment, precision instrumentation and mil/aerospace applications.

The above products are separate integrated circuits that perform ADC functions. With the advent of system-on-chip designs (SOC), microcontroller manufacturers have been able to put higher resolution, faster sampling ADCs on-board.

The ability to perform high-level ADC functions on a microcontroller has been a function of the performance of the processor core. Silicon Labs has been able to incorporate a 24-bit sigma-delta ADC into an 8051-based microcontroller (see Figure 3). This is quite powerful for small, lower power designs. Of course, the speed of the conversion is not that of a standalone ADC, but the convergence is happening.

Company: EEPN

Product URL: Click here for more information

Hide comments


  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.