Electronic Design

Single Op-Amp Peak Detector Features Signal Accumulation

Figure 1 demonstrates a one-way switched-capacitor gain stage circuit, performing a voltage gain of AO = ­C1/C2 only during the decreasing trail of the input signal Vi (with VJ = 0). During the positive signal variations, the output doesn't change, thereby implementing an incremental peak-detector and accumulator circuit.

This device can be used to measure the amplitude of noisy periodic signals with low peak-to-peak voltages. The input signal is accumulated for a certain number of cycles (NC) to obtain a proper output voltage (VO). The amplitude of the input signal can be derived by simply dividing VO by the number of cycles. This reduces any noise in the measurement.

After the reset transistors M1 and M2 are turned off, the circuit works as a normal inverting gain stage for every negative input variation. During positive voltage variations, the output node VO doesn't change and the feedback is guaranteed by diode D1—avoiding op-amp saturation. The signal path occurs along the feedback path C2-D2, where C2 holds the charge packets and D2 prevents removal of the integrated signal from C2 during the positive input-voltage variations. This operation can be repeated until a proper output signal change is obtained. The total output voltage variation can be expressed as:

where NC is the number of cycles applied to the input and VPP is the negative peak-to-peak voltage variation of the input signal within each period.

Figure 2 shows the circuit's output-voltage variation for 10 cycles of a sinusoidal input signal with an amplitude of 10 mV and a frequency of 100 kHz. The measured output variation is 200 mV, which is in accordance with the above equation. Note that the higher the number of accumulation cycles (NC), the lower the noise contribution at the output voltage.

This circuit can also be used as a phase detector between two signals (VI and VJ) having the same amplitude. When the two signals are applied at inputs VI and VJ, the amplifier accumulates only the negative difference between the two signals. Figure 3 shows the circuit's response to different phase-shift conditions. For a 0° phase shift, the resulting output voltage is 2A (where A is the signal amplitude of VI and VJ), which is the maximum anticipated signal. For 180° of phase shift, the output voltage is zero, as expected.

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