Over the last several years, we've seen ICs wrap lots of applicationspecific functionality around a mixed-signal core, ultimately creating a canned solution for consumer-products OEMs. Expect more of the same this year.
For example, there's Wolfson Microelectronics' WM8781 (see "Digital TV, Audio Boost Analog/Mixed-Signal"). This high-input-voltage, 24-bit, sigma-delta analog-to-digital converter (ADC) suits audio gear. Its application-specific customization includes the ability to accept stereo line-level inputs and a clocking scheme that facilitates running the clock of an attached processor clock at an MPEG-friendly 384 times the audio sampling frequency.
ASSPs Swallow DACs
In 2007, look for sampling rates to push far beyond audio. It's been getting difficult to find new discrete digital-to-analog converters (DACs), except in the upper reaches of the radio frequency spectrum. Now, even there, subsystem integration is starting to happen.
In December, Analog Devices announced its AD9910, a 1Gsample/s, 14-bit direct-digitalsynthesis (DDS) chip. (Allowing for anti-aliasing, that implies output frequencies of up to 400 MHz with 0.23-Hz resolution.) The DAC is part of the IC, and its 1 Gsample/s is almost as fast as ADI's fastest standalone 14bit DAC, the AD9736, which goes to 1.2 Gsamples/s (see the figure).
Many of the ICs that integrate DACs are consumer audio products. It could be argued that integration there is necessary simply because the chips are being designed for OEMs that specialize in manufacturing, and that what these OEMs are, in effect, doing is outsourcing subsystem design to the chipmakers. That isn't true with the AD9910, though. The AD9910 was developed for high-performance applications as varied as radar systems, military communications, and high-end test equipment. Companies in those businesses generally do their own subsystem design.
Still, for a circuit designer in that kind of environment, integrating the DAC in a chip that functions as a complete subsystem buys many of the same advantages it does for consumer-products OEMs. These include a shorter development cycle, a smaller footprint, and a more sophisticated design achieved at little risk.
Integration's advantages to the chip maker include the ability to achieve differentiation by giving subsystem designers almost as much circuit versatility as they would have if they started with a blank slate.
For instance, consider some of the sophisticated architecturally features of the AD9910: It takes data in via a 250-MHz serial I/O port and stores that data in internal control registers; on-chip static RAM supports various combinations of frequency, phase, and/or amplitude modulation, or alternatively, the chip will support a user-defined, digitally controlled, linear sweep mode; and for more advanced modulation functions, a high-speed parallel data-input port enables direct frequency, phase, amplitude, or polar modulation.
A related advantage for chip makers that have developed a high-performance DAC core is the ability to reuse it in other designs. ADI utilized the same core in the AD9957 1-Gsample/s quadrature digital upconverter. This "QDUC" accepts an I and Q data stream from a serial or an 18-bit parallel port and outputs a modulated signal from the DAC. This moves modulation into the digital domain, which has advantages in WiMAX and cable modem applications.
Bettering The Best
Naturally, chip makers still address raw performance. But it takes a strenuous effort to top your own (and your competitors') previous personal bests time after time. TI just announced a monolithic 12-bit, 500-Msample/s pipeline ADC with a 2-GHz input bandwidth and low-voltage differential signaling outputs. The ADS5463 targets communications, amplifier linearization, test and measurement instrumentation, software-defined radio (SDR), and radar and imaging systems. It boasts a guaranteed minimum 63.5-dBFS signal-to-noise ratio (SNR) at a 100-MHz input frequency. Other specs at the same input frequency include a 70-dBc spuriousfree dynamic range (SFDR) and 64dBc second- and third-order harmonic distortion. These contribute to a 62-dBc signal-to-noise and distortion (SINAD), which yields a guaranteed 10-bit effective number of bits (ENOB) resolution.
This is best-in-class performance, but it's a very close race. I got a sense of this from TI's press briefings, in which the company compares the "typical" specs for the new chip with those of its closest competitor, another 12-bit, 500-Msample/s ADC.
Looking at SNR at the full conversion rate, with a 250-MHz IF, TI scores 64.5 dBFS versus 62 dBc for the competitor. For SFDR, it's 76 versus 72 dBc. Those 2.5- and 4-dB differences are significant in high-end designs. But as deep as they are below carrier level, every decibel of reduced noise or distortion must represent a hard-fought engineering battle and some serious anxiety in the testing lab as the results are confirmed.
In fact, TI isn't relying on just performance numbers to promote the ADS5643. It's also emphasizing that the device is available at introduction in industrial and military temperature-range versions, that a space-qualified version is also available, and that its packaging has a much smaller footprint than the competition.
Everybody Can Play
These days, designers no longer are limited to buying their silicon ready-made from independent device manufacturers (IDMs). Chipidea has probably the most comprehensive library of mixed-signal and pure analog IP for fabless designers.
The company boasts 23 6-, 8-, 10-, and 12-bit successive-approximation-register (SAR) cores with conversion rates from 10 ksamples/s to 4 Msamples/s; 10 6-, 8-, and 10-bit pipeline ADCs, most in the 100- to 200-Msample/s range, but with one 6-bit parallel converter rated for 600 Msamples/s and another rated for 1 Gsample/s; 19 10- and 12-bit pipeline ADC cores in the 40- to 100-Msample/s range, with 24 more pipeline ADCs at lower conversion rates and resolutions up to 14 bits; and a pair of 120-Msample/s sigma-deltas with 11 or 13 bits of resolution.
This summary represents only Chipidea's non-specialty converter intellectual property. The company also has seven voice or audio application-specific cores. As one would expect, given the difficulty of down-scaling analog cores to shrinking geometries, most of the cores are characterized for the higher-voltage process geometries (0.35 to 0.11 mm) at TSMC, UMC, and Chartered. Yet one converter is intended for Chartered's 90-nm process technology and another for Chartered's 65-nm line.
And that's just ADCs. Chipidea has more analog IP for DACs, filters and analog front ends, RF functions, delta-sigma modulators, and power management. While the established analog IDMs are now competing by offering mixed-signal subsystems on a chip, they may soon be feeling a little heat from fabless competitors.
Data Converter Trends