The first product manufactured in the new HPA07 CMOS process is the OPA300 low-noise, high-speed op amp. This amplifier features the fast settling time (150 ns to 0.0015%) required to buffer high-speed 16-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) operating at 1 Msample/s or higher. At the same time, the chip allows single-supply operation.
So with its operation fully specified from +2.7 to +5.5 V, the chip will allow both the SAR ADC and the amplifier to run off of a single 3.3-V supply. Until now, an op amp in this application would require a ±5-V supply. It would also draw more current. Quiescent current is 7 mA, dropping to 2 µA in shutdown.
Additionally, the output of this amplifier swings to within 75 mV of the supply rails. In contrast, some comparable ±5-V op amps produce outputs that may only swing within 1.5 V of the supply rails. Another key feature is the amplifier's 3 nV√Hz \{\{editor note, this is per square root Hertz\}\} 1/f noise.
The device will be offered in eight-pin SOPs and, starting in the third quarter, in six-pin SOT-23s. In lots of 1000, the chip costs $1.25.
Texas Instruments For more details, go to http://amplifier.ti.com/sc03109