Senior R&D Manager, Synopsys
Troy Gilliland is a senior R&D manager for DesignWare Embedded Non-Volatile Memory (NVM) IP at Synopsys. Prior to joining Synopsys, he worked for VirageLogic, Impinj and Zilog in NVM, high-voltage, PLL, ADC, and RF mixed-signal development. With more than 17 years of experience in the semiconductor industry, he has strong knowledge of NVM/analog/mixed-signal and device physics. He holds both a BSEE and MSEE from the University of Washington, Seattle. He can be reached at [email protected].