Auto Electronics

Automakers adapt new ways to control power

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The increasing complexity of automotive electronic systems has spurred automotive companies and their electronics suppliers to explore and adapt approaches that have proven to be successful in other markets. Traditionally, automotive electronics suppliers, especially those that supply directly to automotive companies, have extensively used custom semiconductors for many portions of their designs. Their volumes and system design methodology allowed this process to work in the past.

Today's automotive electronic systems have increasing requirements for shorter design cycles and the need to verify the interoperability of the entire system with production-ready hardware as soon as possible. Accompanying this faster time to market is increased pressure in quality performance where zero defects are now required. Consequently, this shorter time frame requires a different design methodology, especially for the power control portion of the system.

In addition, design methodology for the entire system is changing. It has historically depended on hardware and software for differentiation. The future is more hardware commonality and increased software differentiation.

The new approach dictates that the integrated circuit (IC) supplier have insight into the application, system knowledge, the range of essential technologies and products, and more than a passing familiarity into their automotive electronics customers' requirements for next-generation products. The combination of all of these factors has created a transition to application-specific standard products (ASSPs) for automotive systems.


The automotive ASSP is an off-the-shelf IC solution designed specifically for the unique requirements in a specific automotive application. Because it is available immediately, it can help to reduce the system design cycle time. The ASSP is one of the direct results of the emergence of software as the differentiating force in system design. Software has reduced the importance of designing a custom IC for those hardware circuits that interface to the external components to differentiate one end customer's product from another. The hardware, especially the power control portion, must meet the requirements of the application, but it is not that different from one user to the next. As a result, the custom IC does not provide the value that it previously did.

Market segments with frequent introductions of new products such as consumer areas of cell phones and computers pioneered the ASSP approach to replace application-specific integrated circuits (ASICs). The earliest ASSP products appeared in the mid-1990s.

Figure 1 shows how an ASSP process differs from developing an ASIC.

For a custom ASIC, the customer must pay non-recurring engineering (NRE) charges but obtains entire control of the specification. Since the customer may not know the semiconductor manufacturing pro-cess trade-offs as well as the supplier, finalizing the specification and other design aspects can increase the development cycle. With the semiconductor design team dedicated to a single project, lower R&D efficiency typically results. The overall risk to the supplier and the customer is higher, since the project is usually one of the critical path items in the overall system development cycle. Additionally, proving or debugging each IC in the application increases ramp-up risks.

For the ASSP, a lead customer typically works closely with the supplier. The supplier writes the specification for the product but the lead customer has a strong influence on the spec. This reduces the customer's time to market and provides an advantage over their competition. The approach eliminates or greatly reduces NRE charges. The entire market, and especially an early follower, benefits from the economies of scale that result from high volume usage that also drives continuous improvement in manufacturing processes resulting in high quality levels. The entire process results in a lower burden on customer engineering resources such as defining specifications and debugging issues. Furthermore, proven ASSPs help to minimize quality risks related to launching a new IC in the market. The bugs are understood and fixed once, providing an established product required for zero defects.

Looking more closely at the specific advantages and disadvantages of the ASSP vs. a custom IC or ASIC, Figure 2 provides a quick comparison of the trade offs. Customers who choose a custom IC approach obtain the highest level of integration and minimize the number of devices and board space. However, they experience a longer development cycle, increased risk and limited flexibility. Since a custom IC requires very high volume, many customers do not qualify for this approach. For those with sufficient volume, each IC has a small market segment so production volumes are limited.

In contrast, an ASSP provides off-the-shelf availability, a standard part for each application, so the customer can quickly prototype a new design and lower the development risk. While the integration level may be lower for the ASSP, the flexibility of the ASSP approach provides a compelling factor in the ASSP's favor. Both tier 1 and tier 2 automotive suppliers are ideal candidates for the ASSP approach.


In body electronics, several different motor loads provide ideal candidates for the ASSP approach. Figure 3 shows the motor controls in a door zone module, including the TLE 8201. This ASSP can control central lock, deadlock or mirror fold, mirror position, mirror defrost and up to four 5 W lamps, such as turn signal, courtesy/warning or control panel illumination.

The block diagram of the door module ASSP, shown in Figure 4, identifies the outputs and integrated control circuitry. The outputs are:

  • full bridge (150 mΩ) for main doorlock motor;
  • two half-bridges (400 mΩ) for deadbolt and mirror position motor or mirror fold motor;
  • two half-bridges (800 mΩ) for mirror position;
  • high-side switch (100 mΩ) for mirror defrost;
  • four high-side switches (500 mΩ) for 5 W lamps; and
  • current sense analog output with multiplex.

All outputs have short circuit protection and an open load diagnostic. Overtemperature circuitry with warning protects the power stages. Exceeding the temperature of 145 °C (typical) provides a warning and exceeding 175 °C (typical) causes a thermal shut-down. Outputs are grouped with Group 1 including OUT 1, OUT 2 and OUT 3 and Group 2 including OUT 4 to 11. If one or more temperature sensors within a group reaches the shutdown threshold, all outputs within the group are switched off, while the other outputs continue normal operation.

For higher power motor control applications that operate within a current limitation of 43 A (typical), the high current half bridge shown in Figure 5 provides a cost-effective means of implementing micro-controller-controlled functionality. Containing one p-channel high side MOSFET, one n-channel low side MOSFET and the integrated driver IC in one package, the unit has PWM capability of up to 25 kHz combined with active freewheeling and a path resistance of 16 mΩ (typical) for the p- and n-channel combination at 25 °C. Other application-specific features include logic level inputs, diagnosis with current sense, slew rate adjustment, and dead time generation, as well as overtemperature, overvoltage, undervoltage, overcurrent and short circuit protection. The separate power devices allow substitution of other voltage rating and size MOSFETs without requiring a new IC design.

The increasing number of low side switches in powertrain control applications demonstrates the need for an ASSP with standard protection and diagnostics in applications beyond body electronics, as well as ease of communication with digital circuitry. Figure 6 shows a block diagram of an ASSP that can control up to 18 loads.

The monolithic, fully protected IC has 18 power MOSFETs that range from 0.35 Ω to 1 Ω per switch, a serial peripheral interface (SPI) for input and diagnostics, and internal logic for control. System-critical ASSP functions include over temperature, short to battery, short to ground and open load protection and diagnostics. In addition, 16 of the 18 channels can be controlled directly in parallel for pulse width-modulated (PWM) applications. The µS-bus for parallel high-speed PWM signals can provide a savings of up to 30 pins on both the power IC and the microcontroller packages. The µS-bus is one of three options the system designer has to control the power stages. Packaging for all of these powertrain control specific features is a P-MQFM 64-10 that has an integrated heat spreader to improve the power dissipation.


Designers will continue to use ASIC technology to protect intellectual property (IP) in applications or to achieve the highest integration level and address physical size constraints. However, as customers shift from hardware to software as a means to differentiate their products, a design methodology such as the ASSP approach provides many benefits including reduced time to market. These advancements combined with new architecture approaches by semiconductor suppliers promise to reduce further the design cycle time and help system designers achieve long-term cost reduction and zero defects in their system.


Shawn Slusser is the director of power marketing, North America Automotive Market for Infineon.

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