Synopsys offers design-centric yield management

March 19, 2009
Synopsys (www.synopsys.com) has introduced Yield Explorer, a yield management product that expedites the discovery and mitigation of yield limiters in leading-edge integrated circuits.

Synopsys has introduced Yield Explorer, a yield management product that expedites the discovery and mitigation of yield limiters in leading-edge integrated circuits. The firm said the product can accelerate first-silicon debug time by an order of magnitude compared with traditional methods, and can minimize design re-spin through rapid, comprehensive capture of design-process-test interactions causing low yield.

Traditional yield management methods are centered on wafer and die-level data and do not offer an easy connection to design, according to Howard Ko, senior vice president and general manager of Synopsys’ Silicon Engineering Group. He added that traditional methods are also inadequate for leading-edge technology nodes due to the systematic yield limiters originating in design-process-test interaction. As a result, users have had to devise manual workarounds to move data between yield management and EDA tools.

"The nanometer node yield challenges are largely a result of complex marginalities in the interaction between design, process and test,” he said. Our customers have stressed the need for bringing design information into yield analysis," Ko said. "Yield Explorer links all aspects of the design, manufacturing and test flows into a single data-bank.”

Davide Appello, DfX technologies senior expert at STMicroelectronics said Yield Explorer enabled STMicro to “achieve a tenfold improvement in time to results when investigating the causes of test failures using our volume diagnostics approach. We were able to rapidly isolate, prioritize and correct the significant design issues within the first batch of product chips. This helped us reach higher yields immediately on the next design spin. Additionally, Yield Explorer also allowed accurate electrical defectivity monitoring, which is a key enabler for prediction of quality excursions for our automotive products."

The Yield Explorer GUI is structured around a layout viewer for easy superposition of test failures on the corresponding layers of physical design. The GUI also features the industry standard Tcl scripting environment, which can accommodate large volumes of data with customer-specific data naming and content requirements.

Sponsored Recommendations

Near- and Far-Field Measurements

April 16, 2024
In this comprehensive application note, we delve into the methods of measuring the transmission (or reception) pattern, a key determinant of antenna gain, using a vector network...

DigiKey Factory Tomorrow Season 3: Sustainable Manufacturing

April 16, 2024
Industry 4.0 is helping manufacturers develop and integrate technologies such as AI, edge computing and connectivity for the factories of tomorrow. Learn more at DigiKey today...

Connectivity – The Backbone of Sustainable Automation

April 16, 2024
Advanced interfaces for signals, data, and electrical power are essential. They help save resources and costs when networking production equipment.

Empowered by Cutting-Edge Automation Technology: The Sustainable Journey

April 16, 2024
Advanced automation is key to efficient production and is a powerful tool for optimizing infrastructure and processes in terms of sustainability.

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!