STMicroelectronics, STATS ChipPAC, and Infineon Technologies have agreed to jointly develop the next generation of embedded wafer-level ball-grid array (eWLB) technology. The R&D effort will focus on using both sides of a wafer to provide solutions for semiconductor devices with a higher integration level and a greater number of contact elements. The three companies will own the resulting intellectual property.
The eWLB technology combines traditional front-end and back-end semiconductor manufacturing techniques with the parallel processing of all of the chips on the wafer to reduce manufacturing costs. With the increased integration of the silicon’s overall protective package and a dramatically higher number of external contacts, it can provide significant size and cost benefits for wireless and consumer electronics manufacturers.
“We see a shift in the packaging industry towards the energy-efficient and high-performance eWLB technology,” said Wah Teng Gan, vice president of assembly & test at Infineon Asia Pacific. In fact, the companies believe that this research will play an important role in developing eWLB as an industry standard for cost-efficient and highly integrated wafer-level packages.
So far, eWLB can reduce dimensions by 30% compared to conventional lead-frame laminate packages and provide an almost infinite number of contact elements. STMicroelectronics will use the technology in several products in wireless and other application markets, expecting first samples by the end of 2008 and production capabilities by early 2010.
STATS ChipPAC Ltd.