How Microprocessor Systems Defined Logic Analyzers

June 10, 2002
When the microprocessor and inexpensive ROM memory arrived in the early 1970s, building small, stored-program computing systems became practical. System designers learned that with the rapidly growing applications of microprocessors, a conventional...

When the microprocessor and inexpensive ROM memory arrived in the early 1970s, building small, stored-program computing systems became practical. System designers learned that with the rapidly growing applications of microprocessors, a conventional oscilloscope-centric debug approach was no longer effective. They needed a new tool that would let them view the simultaneous operations of increasingly parallel systems.

In 1973, the introduction of the logic-state analyzer by Agilent Technologies, then Hewlett-Packard, and the logic-timing analyzer from Biomation immediately satisfied the debugging requirements of systems designers applying the first microprocessors. Logic-state analyzers synchronously capture the state of the system to the clock, while logic-timing analyzers use an asynchronous (internal) clock to sample the system.

The first logic analyzers let system designers trigger on a 12-bit address and data pair from a processor like the Intel 4004. Once the trigger event had been detected, the analyzer would capture and display the contents of its 16-state-deep memory. As microprocessors advanced and system debug requirements grew in complexity, new logic analysis enhancements emerged. Later in the '70s, Agilent introduced logic analyzers that featured multiple trigger-event sequencing, microprocessor-specific instruction inverse assembly, and a combination of state and timing analysis.

By the mid '80s, microprocessor-based systems were capturing analog signals, performing digital signal processing, and outputting analog signals. Agilent integrated digital oscilloscope channels into the logic analyzer. For the first time, digital designers had a comprehensive view of system operation that showed critical insights into hardware and software interaction.

Microprocessor packaging and bus structures have advanced dramatically over the last three decades, driven by the need for higher performance systems. In the early '70s, logic analyzer probing consisted of wire leads with simple pin grabbers, called flying leads. Although it worked, this approach was cumbersome and time consuming to connect to dual-inline packages. To simplify connection of the logic analyzer to the system under test, microprocessor-specific probing was introduced for the Intel and Motorola processors in the late '70s.

Today's logic analyzers offer a wide array of high-signal-integrity alternatives to the flying lead probe. High-density pin grid array (PGA) and standard bus interposer probing solutions simplify the connection of the analyzer to popular microprocessors and buses—such as PCI and DDR.

Digital system performance demands have steadily increased, driving microprocessor and I/O buses to higher operating rates. Logic analyzer performance has increased in speed, width, and memory depth to meet the needs of today's system designers debugging multiple, gigabyte-transfer-rate buses. Equally important, today's logic analyzers enable the capturing of multiple time-correlated snapshots of traffic on the buses that make up a system.

These rapid changes in microprocessor system architecture and performance have shaped the logic analyzer. Over time, it has evolved from a tool that presents a view into the system under test as ones and zeros, or a binary waveform display, into a tool that provides a processor/bus-specific time-correlated view into increasingly complex digital systems. Logic analyzers will continue to change to meet new system debug requirements of the digital designer.

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