Electronic Design

Leapfrog: First Look -- More On Graphics Coprocessors

By adding a graphics coprocessor to an existing system architecture, designers can gain a significant performance improvement over graphics that use the host CPU to perform the basic computations. The use of a coprocessor to offload and thus speed up critical computations goes back to the early days of the PC architecture when Intel crafted a floating-point coprocessor to support the CPU.

In the graphics coprocessor space for portable applications there are three main players: ATI, MediaQ, and Seiko-Epson. All three have very-low-power chips that combine graphics and multimedia acceleration for LCD-based small-area displays. For example, ATI’s Imageon 100 and Imageon 3200 (www.ati.com) combine 2D graphics and video acceleration, along with MPEG/JPEG decoding, on a power budget suitable for handheld devices. The Imageon 100 has a typical active power of less than 20 mW. On standby, the power drain is under 0.03 mW. For MPEG/JPEG decoding, the chip can decode QCIF or CIF data streams at rates of up to 30 frames/s.

The chip can support a wide range of STN or thin-film transistor (TFT) monochrome or color displays with a maximum resolution of 640 by 480 pixels at a color depth of 16 bits/pixel. A frame buffer of 384 kbytes is embedded on-chip. An integrated SDRAM controller allows up to 8 Mbytes of external memory to be addressed. The host-bus interface can tie the chip into processors like the Intel StrongARM, the Motorola DragonBall, the MIPS family from NEC, and the Hitachi SH3.

A more highly integrated version, the Imageon 3200, includes USB on-the-go support that lets the system function as either a host or a client. A video-capture port enables peripherals such as a digital camera to be connected to the system. Images as large as a full-VGA screen (640 by 480 pixels) can be captured. The port supports separate Vsync and Hsync, as well as embedded control signals, in the data stream.

An integrated SD memory-card interface and I/O controller can transfer data at up to 10 Mbytes/s. Even though the chip packs more features than the Imageon 100, it consumes less power in both active and standby modes—usually just 20 mW when active and 0.01 mW on standby.

Packing a 64-bit graphics engine for high-performance 2D displays, MediaQ’s MQ2100 (www.mediaq.com) can handle screen resolutions of up to 320 by 240 pixels or double-buffered images with resolutions of up to 176 by 220 pixels. Consequently, it offers high-level graphics performance for better game playing and other applications. Targeted for extremely low-power operation, the MQ2100 consumes only 5 mW during normal operation and 0.011 mW during standby.

Like the Imageon 3200, the MQ2100 packs a digital-camera input port and a JPEG encoder that can capture full-VGA images. A previous chip, the MQ2074, includes the graphics but not the camera interface.

Several versions of a high-resolution graphics LCD controller/companion chip also hail from Seiko-Epson (www.eea.epson.com). The S1D135xx family includes versions with both on-chip DRAM or external SDRAM. Based on the S1D13506 controller, the S1D13806 adds 1.28 Mbytes of on-chip DRAM and a 2D graphics accelerator. It can handle graphics with resolutions of up to 800 by 600 pixels with a color depth of 16 bits/pixel. Offering both a digital interface for LCD panels and a RAMDAC for CRTs, the controller permits independent simultaneous displays with different images. The chip also packs a digital camera interface for capturing JPEG images.

Another version of the basic S1D3506 graphics chip, the S1D13508, uses external SDRAM. The S1D13808 employs chip-stacking technology to pack a 2-Mbyte frame buffer in the same package as the controller.

The S1D12A03 targets lower-resolution applications (up to 320 by 320 pixels with a color depth of 16 bits/pixel). It incorporates a 112-kbyte on-chip SRAM display buffer as well as hardware acceleration support. Features include picture-in-picture and pixel doubling to improve image viewability. A USB 1.1 client port provides a link to a host system. Additional versions of the chip are available with larger on-chip buffers: The S1D13A04 includes 160 kbytes, while the 13A05 packs 256 kbyes, so larger images can be held in active memory. Several smaller versions, the S1D13705, ’706, and ’708, come with an 80-kbyte frame buffer and no pixel doubling capability.

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