Wireless Systems Design

Nanotechnology Plans Its Entry Into Wireless

Although It Is Still In Its Infancy, This Industry Segment Will Change The Way That Designers And Manufacturers Create Next-Generation Devices.

Interest in nanotechnology can be traced back to an influential 1959 talk by Richard Feynman, the famous Nobel Prize-winning physicist. During that speech, Dr. Feynman argued that scientists and engineers alike needed to begin studying ways to build the equipment necessary to work at atomic dimensions. Because an atom is roughly 0.10 nm, nanotechnology is often described as the application of molecular systems or atomic particles.

The capability to design and fabricate electronics at the atomic level represents a breakthrough in technology. Yet there is nothing magical about nanotechnology. It is the next logical advancement after microtechnology, which focused on micron-level entities (one-millionth of a meter). For proof, look at the microelectromechanical-systems (MEMS) devices of today. They are expected to evolve into even smaller components. Essentially, they will become the nanoelectromechanical-systems (NEMS) devices of tomorrow.

In the 1960s, advances in material science were a prerequisite for the creation of early semiconductor technologies. Similarly, advances in nanotechnology will require a more mature understanding of nanoscale materials. When this understanding is attained, numerous applications will emerge in the fields of electronics, optics, and biology.

One of the alluring features of nanotechnology is its ability to allow the development of chips beyond silicon semiconductors. When fully realized, nanoscale electronics will provide hard disks of incredible density and extremely small size, such as those demonstrated by researchers at the State University of New York's Albany campus (www.albany.edu). Or consider IBM's (www.ibm.com) thermomechanical-storage "Millipede" project. The company successfully demonstrated a data storage density of 1 trillion bits per square inch—20 times higher than the most dense magnetic-storage system currently available.

Nanometer-scale materials are also being demonstrated in display technology. For example, Applied Nanotech, Inc. (www.sidiamond.com) recently showcased a 14-in. nanotube display.

While nanotechnology remains in its infancy, the nanoscale product market is estimated to have a total potential of $300 billion per year within 10 years. It is forecasted for another $300 billion per year for global integrated-circuit sales. But these revenue potentials will only be realized if the theory of nanoelectronics can find practical applications.

Why should designers of today's wireless systems be interested in nanotechnology? Though there are several reasons, the most compelling one is probably that many designs are already taking place at 130 nm. Now, the relentless dictates of Moore's Law are pushing the scale even lower. The development and production of chips at the 65-nm scale is only two generations away.

In addition, several major companies in the U.S. and Europe intend to launch commercial products within the next three to seven years. This means that the design tools and manufacturing processes for these products are being developed now.

Skip Rung, former head of the Oregon branch of Research and Development for Hewlett Packard (www.hp.com), recognizes a more subtle benefit for nanotechnology in wireless systems. As Rung states, "There is at least one important issue where "nano" may play a role, and that is energy sources for wireless devices." He explains that while fuel-based systems like fuel cells and fuel-powered thermoelectrics have much more energy/volume than batteries, they may need to incorporate some nano-materials before they can replace batteries in wireless systems.

One company that's dedicated to the development of nanotechnology-enabled systems is Nanosys, Inc. (www.nanosysinc.com). So far, these systems include zero- and one-dimensional nanometer-scale materials as their principal elements, such as nanowires, nanotubes, and nanodots (quantum dots). Nanowires are the basic building blocks of molecular-scale electronics. Their presence in design architectures and components will enable potential breakthroughs in the performance, speed, and power reduction of electronic devices.

HP Labs, for example, already created electronic circuits made from a single layer of molecules. The molecules were sandwiched between two lines of nanowires that were just a few atoms wide (FIG. 1). The circuit was made by a perpendicular crossing of two sets of nanowires. The molecules trapped between the wires at the intersection formed a current-flow-regulating switch. When certain rare-earth metals were added to the molecular filling, a diode was formed. As with microscale electronics, the diode constitutes the basis of all Boolean expressions needed for computing-oriented nano-scale devices. While HP is in the process of making simple nanowire-based ICs, it will be many years before such components reach the marketplace.

Nanotubes are a sequence of nanoscale particles. Typically, they're composed of carbon C60 molecules. Though they're stiffer than steel, nanotubes are only a nanometer wide. But they are many microns long. Researchers in The Netherlands, such as Cees Dekker from the Delft Institute of Technology (qt.tn.tudelft.nl), have demonstrated a carbon-nanotube transistor that is based on a single, rolled-up sheet of carbon atoms (FIG. 2). The nanotube—about 1 nm in diameter—bridges two closely separated metal electrodes (400 nm apart) atop a surface coated with silicon dioxide. When an electric field is applied to the silicon via a gate electrode, current is induced to flow across the nanotube. In the future, it may be possible to form a metal-semiconductor junction made completely of carbon nanotubes.

Last year, IBM announced the creation of a high-performance, carbon-nanotube transistor. The company claimed that the device produced more than twice the transconductance per unit of width when compared to competitive silicon-transistor prototypes. Structurally, the single-wall carbon-nanotube field-effect transistors (CNFETs) resembled conventional silicon metal-oxide-semiconductor FETs (MOSFETs). The NCFETs had gate electrodes above the conduction channel that were separated from the channel by a 15-to-20-nm layer of silicon-dioxide dielectric.

Today's nanotechnology also has a third common form, which is called the quantum dot (FIG. 3). Quantum dots are nanoscale crystalline structures that can transform the color of light. In essence, they are molecular-scale optical beacons or LEDs that can emit a broad range of colors. In fact, one of the main advantages of quantum dots is their capability to emit different wavelengths simply by altering the size of the core nanostructure. A 3-nm cadmium-selenide (CdSe) core emits green light (520 nm), for example. But a 5.5-nm CdSe core emits red light (630 nm).

Quantum dots are well suited for building nanoscale computing devices in which light is used to process information. Most applications for quantum dots are currently in bio-medics. Quantum Dot (www.qdots.com), for instance, is developing quantum-dot particles for use as detectors for cell-level nucleic acids and proteins. These semiconductor nanocrystals, dubbed Qdots, have interesting optical properties and applications in drug discovery and development.

Chip manufactures are struggling to develop nanoscale products using current manufacturing processes and lithography technologies. In order to meet the image-fidelity demands of nanoscale geometries, various optical tricks—which are generally known as resolution-enhancement techniques (RETs)—are being utilized.

In today's semiconductor production, an image process known as lithography produces all feature sets. The wavelength of the light used in the lithographic process limits the resolution of the corresponding image. "For years, it was less than or approximately equal to the half-pitch of the features," observes Joseph Sawicki, General Manager of the Physical Verification and Analysis division of Mentor Graphics (www.mentor.com). In contrast, the current lithographic process results in a mask that pretty much looks like the design.

The move toward nanoscale designs has changed that one-to-one representation, however. To achieve the existing 180-nm node technology, manufacturers are required to use a light source with a wavelength of 248 nm. Effectively, this moves lithography into the sub-wavelength domain.

Optical and process correction (OPS) is one of the primary optical "tricks" or RET approaches that's implemented on the mask. This approach changes the design geometry by pre-compensating for distortions. OPS techniques can lead to some very exaggerated shapes. But they do not constrain the designs. Plus, this method has only a moderate impact on the cost of the mask, notes Mentor's Joseph Sawicki (FIG. 4).

Unfortunately, for lithography at 65 nm, OPC alone will not be enough. Other RET techniques, like alternating phase-shift masks (PSMs), will be needed as well. By altering the phase of the light that passes through different portions of the mask, PSM can create regions of destructive interference in the image with higher contrast. The resulting dark fringe areas can enable extremely narrow design features.

Unfortunately, common alternating PSM techniques require two masks instead of the one simple binary mask used in most of today's micro-scale designs. The second mask is needed for the sophisticated etching process that provides the phase shifting. This additional mask can add greatly to the cost of the manufacturing process for nano-scale designs.

Christopher K.Y. Chun, Technical Manager for the Advanced Power Management Group (WMSD, WBSG, and SPS) at Motorola, agrees that nanometer designs are pushing the limits of optical lithography. As he points out, "Lithographic techniques now require the inclusion of phase correction to correct for optical distortions at these small dimensions." With the significant increase in devices on a single die, he further explains that verifying that all of the transistors are working becomes increasingly difficult.

The implementation of innovative RET approaches does affect designers. They must now pay closer attention to manufacturing issues early in the design process. Accordingly, design-for-manufacturing (DFM) techniques are gaining renewed popularity among vendors involved with 0.13- and 90-nm designs. Anticipating the requirement for better DFM tools, Mentor Graphics just released an enhanced version of Calibre RET. This tool tackles the high-resolution needs of sub-100-nm nodes.

Chip foundries also are stepping up to meet the challenges of nanoscale processes. For example, Taiwan Semiconductor Manufacturing (www.tsmc.com) recently announced the launch of a 90-nm manufacturing process under the brand name Nexsys.

In addition, several electronic-design-automation tool vendors are providing products for nanoscale designs. Synopsys' (www.synopsys.com) Prime-Time tool provides an integrated delay calculator and static-timing-analysis capabilities to meet the timing-closure needs of 90-nm digital designs. OpenAccess (www.si2.org) offers an industry-standard API and reference database for the design of nano-scale ICs.

Obviously, this article only scratches the surface of the exciting and challenging world of nano-electronic designs. Nanotechnology is the up and coming next-generation semiconductor technology. As a result, understanding its unique requirements is a must for wireless designers and manufacturers.

TAGS: Components
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