Few examples of instrumentation are as commonplace and taken-for-granted as the ordinary time-of-day analog wall clock. Whether regarded as tool or tyrant, the humble round clock is probably the oldest example of an automatic computer—it continuously calculates and displays a readout of the position of the sun in its daily cycle through Earth's sky.
More recently, in this era of interplanetary exploration, Earth and its day aren't the only subject of interest to clock-watchers. Sometimes the need arises to know the sun's position through a day of a different length, in an entirely different sky. The Mars Mean-Solar-Day Timebase was implemented as part of a special clock intended to display local solar time for the site near Mars' south pole, selected for the (ill-fated) NASA Mars Polar Lander (see the figure). The clock and timebase are presently installed in the UCLA Mars Science Operations Center (MSOC). The whereabouts of the Lander are, regrettably, unknown.
The timebase works by producing an ac drive suitable for direct input to a conventional 120-V ac, 60-Hz electromechanical clock. The output waveform has a specific crystal-controlled frequency (58.3947 Hz). It happens to have the same ratio to 60 Hz as the length of the Mars' mean-solar-day (called a "Sol" ) has to Earth's solar day—namely 1.0274913:1 (Levitt). This relationship retards the clock so that it accurately models the slightly longer Martian day. The clock's synchronous motor, although designed for the U.S. 60-Hz-mains standard, doesn't seem to notice the modest, less than 3% difference. Therefore, it runs more or less normally (perhaps just a tad warm).
Timebase generation begins with the 2.4576-MHz pi-network oscillator formed by the quartz crystal and the U1 inverter. The resulting squarewave is applied to the modulus 21043 divider made up of U1C, U2A, U3, and U4A and U4B. This combination of gates and flip-flops presents 116.7894 Hz to the U2B flip-flop, which produces a nice 50% duty-factor squarewave at the desired 58.3947 Hz. U2B's symmetrical output is applied to the U1A and U4C gates and the associated RCs to generate shoot-through-free gate-drive signals for the Q2 and Q3 complementary 400-V MOSFETs. The MOSFETs then produce a ±120-V squarewave drive for the clock motor.
The 15-V rail for the timebase oscillator and divider logic is derived using D1 as a shunt-regulator from the +120-V rail. Of interest is the "start-up" circuit consisting of R1, Q1, and the associated RC network connected to U1's pin 3. These components were added to the timebase during debugging to counter an obnoxious tendency of U1 to power up in an output-high state. This held Q2 continuously on, and prevented the 15-V rail from ever rising high enough to allow the crystal oscillator to start and enable the normal timebase operation. Q1 heads off this misbehavior by disabling the NOR gate and Q2 until the 15-V rail rises to a nominal level. That makes the zener diode conduct and turn on Q1, pulling U1's pin 3 low and enabling the NOR gate.
Space fanatics contemplating duplicating the timebase must remember and respect the direct connection of this circuit to the 60-Hz mains. You also must remember that its output signal is a −240 V p-p ≈ square wave, which appears literally everywhere in the circuit. These factors combine to create an abundance of vicious shock hazards that will definitely bite the unwary.
The final calibration of the timebase is best done with an accurate frequency counter by adjusting the 40-pF trimmer (please use a well-insulated tuning tool) for a Q2/Q3 squarewave output period of exactly 0.01712486 seconds.