Digital ICs/DSP: Low-Power CPUs Tackle Multimedia And Communications Applications

Oct. 4, 2004

An advanced multiprocessor architecture conceived from the ground up to run next-generation low-power handheld systems forms the heart of the chips in the CoolProcessor family. The processor's architecture was optimized for low-power, concurrent execution of specific applications, including MPEG-2/4, 801.11a/b/g, H.263/4, JPEG/2000, MP3, GPS, 802.16 Bluetooth, GSM/GPRS/EDGE, and CDMA 2000/WCDMA, in various combinations. Typical power consumption is less than 100 mW when implemented in a standard 130-nm low-power CMOS process. There will be six initial family members, all upwardly code compatible and sharing a single programming model. Applications-development software and modeling tools are additionally available. The first CoolProcessor CPU, the 3P3200, can run combinations of MPEG, JPEG, GSM, and 802.11 concurrently. Planned for release in the second quarter of 2005, it will sell for $8 apiece in lots of 10,000.

3PLUS1 Technology Inc.www.3p1t.com;
(408) 370-3104

About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.