Digital ICs/DSP: Synchronous Timing Source Serves Sonet/SDH Network Applications

April 12, 2004

It supports Master/Slave operation. It runs in Free Run, Locked, or Hold-Over modes. It's available as a standalone chip. These are some of the features of the STC3800 synchronous timing source for Sonet/SDH networks. In the Free Run mode, it locks onto an oven controller crystal oscillator (OCXO). In the locked mode, it locks on one of eight input reference clocks with automatic frequence detection. Compliant with the Telcordia GR-1244-CORE, GR-253, and ITU-T G.812/G.813 standards, the chip delivers four output signals: a sync-clock up to 155.52 MHz, a Sync-8K at 8 kHz, a Sync-2K fixed at 2 kHz, and a selectable 1.544- or 2.048-MHz VBITS signal. When used with the company's OCXOs, the chip has better than a 1 part-per-billion Hold-Over accuracy. The chip supports both serial-peripheral-interface serial and 8-bit parallel bus inputs and operates from a 3.3-V supply. Housed in a 144-contact FBGA, the STC3800 is priced at $178 each in quantities of 1000 units.

Conner-Winfield Corp.www.conwin.com

About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.