Digital ICs/DSPs: DDR DRAM Modules Drive Data At 200, 266, Or 333 Mbits/s

July 5, 2004

Based on the 200-pin JEDEC SO-DIMM standard, the W3EG7266S-D4 512-Mbyte memory module delivers double-data-rate (DDR) throughput at 100, 133, or 166 MHz (200, 266, and 333 Mbits/s). Using 512-Mbit DDR DRAMs, the unbuffered module offers edge-aligned data outputs and center-aligned data inputs. It's organized as 64 Mwords by 72 bits and comes in two height options: BD4 at 1.25 in. and AD4 at 1.38 in. It also incorporates bidirectional data strobes; differential clock inputs; a programmable burst length of 2, 4, or 8; and a programmable read latency of 2 or 2.5. Other features include auto- and self-refresh and serial presence detect. In lots of 1000, it costs $155 each. Delivery is four to six weeks.

White Electronic Designs Corp. www.whiteedc.com

About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.