EE Product News

Timing Devices Tout Versatility

A new family of programmable timing devices is designed to consolidate and replace dedicated fixed-function clock devices. The VersaTime family contains programmable skew and zero-delay buffers, as well as an internal EEPROM to save and restore the configuration of the device. Consisting of six models with either complimentary or single-ended outputs, the devices also integrate an IEEE 1149.1a-compliant JTAG interface, making them suitable for deployment in design-for-test (DFT) infrastructures with support for device programming within the same scan chain. An I2C interface is also available for device programming. In NL68 packages, each device specifies a maximum cycle-to-cycle jitter of less than 75 ps peak-to-peak with equal outputs and 100 ps peak-to-peak with outputs at different levels. Family members include the 5T9820 and 5T9890 with single-ended outputs and the 5T9821 and 5T9891 with complementary outputs. Pricing starts at $2.95 each/10,000. INTEGRATED DEVICE TECHNOLOGY INC., Santa Clara, CA. (408) 727-6116.


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TAGS: Digital ICs
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