To address the needs of current and future stackable embedded PC applications, the PC/104 Embedded Consortium has adopted the PCI/104-Express and PCIe/104 specification. The new stackable PCI Express bus can be immediately incorporated across the Consortium’s 104 EPIC and EBX form factors.
The specification builds on the foundation of following the PC market as defined by the major chip manufacturers. To gain additional room on a module, the PCIe/104 removes the PCI bus. The specification allows maximum use and leveraging of the vast resources and economies of scale of the PC community in both hardware and software development. It also allows maximum backward compatibility with minimal stacking overhead, if any, and allows future bus advances as technologies develop and mature.
The specification offers users unprecedented flexibility in design and stacking configuration, according to the Consortium. PCI bridges, lane replacement, external cabling, high-speed connectivity, large bandwidth capabilities, backward compatibility, and mechanical synergy add to this flexibility.
Also, a new high-speed surface-mount connector was specially sponsored and designed for this application. Maximum effort went into configuring the connector so that it could handle the rugged environment of the embedded market. The connector is optimized for the 0.600-in. (15.24-mm) stack height of the PC/104 architecture and can transport the high-speed signaling of PCI Express over large stack heights while keeping Gen 2 in sight.
PC/104 Embedded Consortium