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Tools Automatically Convert C Algorithms To RTL Descriptions

The A | RT suite of EDA tools automatically converts algorithms written in C to bit-accurate register transfer level (VHDL or Verilog) descriptions. The first two tools in the suite are the A | RT Library for the development of fixed-point C descriptions of algorithms and the A | RT Builder for the direct conversion of algorithms to VHDL or Verilog.Algorithmic IP is a key factor in any system's functionality and performance. Most designs end up in an ASIC or optimized silicon IP core, but relatively few designers are HDL-savvy. The A | RT tools help bridge the gap between algorithmic IP and reusable silicon IP.The A | RT Library consists of a set of C++ classes that encapsulate the characteristics of fixed-point data types and operators. It gives designers an elegant and robust means of refining their original C description to achieve a bit-accurate representation of the algorithm.


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