FPGA maker Altera is acquiring Enpirion, the Lucent spinoff that makes point-of-load (PoL) devices that integrate the coil for the switching regulator. Enpirion will maintain its relationship with its existing customers, and Altera will integrate the design-in of Enpirion’s PoLs into its design tools. Altera’s customers will see a smaller total footprint on the board and shorter design cycles.
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There are three components to Enpirion’s technology. First, it boasts high switching frequencies, up to 8 MHz in commercially available products and up to 20 MHz in the lab. Second, it permits an inductor that’s small enough to be integrated inside the device. Third, the package lead frame is formed around an iron core.
Enpirion’s EL711DI is the first of a new “linear direct replacement” buck regulator family. Intended to replace LDOs, it is a complete 1000-mA buck regulator with output voltages from 1 to 2.5 V in a 3.0- by 4.5- by 0.9-mm dual flat no-lead (DFN) package. It switches at 18 MHz for high efficiency and extremely low output ripple.
Altera also will work with Intel as a fab partner at the 14-nm process technology node, while continuing to use TSMC at 20 nm. According to Altera senior director of program management David Greenfield, further shrinking the size of Altera’s devices while continuing to surround them with power chips at their present scale didn’t make sense.
The power devices surrounding Altera’s FPGAs on a board already took up four times the footprint of the FPGAs and passives themselves, Greenfield noted. The waste of space could only grow worse as new Altera devices emerged. In addition, the power tolerances at new process nodes were only going to get tighter, with faster di/dts, so the Enpirion switching regulator’s inherently faster transient response was a further advantage. And, lower ripple means smaller capacitors.
On the data sheet, with a 3.6-V input, efficiency at 1.5 V peaks at around 75% around 0.35 A and stays more or less flat up to 0.7 A. Peak efficiency at 2.5 V is around 85%. For bulk charge and stability requirements, output capacitance must be at least 10 μF in a minimum 0603 multi-layer chip-scale (MLCC) capacitor package. Additional 10-μF 0603 and 0.22-μF 0402 MLCC capacitors can further reduce peak-to-peak ripple magnitude.