Electronic Design

EDA Update: Mixed HDL/C-Language Design For FPGAs

Mixed HDL/C-Language design for FPGAs recently debuted, courtesy of Aldec Inc. and Celoxica Ltd. The Active-HDL+C integrated FPGA design environment combines Aldec's Active-HDL design entry and mixed-HDL simulation technology with Celoxica's DK engine for C synthesis and co-simulation. Pricing starts at $35,000 for a single-seat perpetual license. Visit www.aldec.com or www.celoxica.com.

TAGS: Digital ICs
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